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參數(shù)資料
| 型號： | IDT88P8344BHI |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 16/98頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SPI3-SPI4 EXCHANGE 820-PBGA |
| 標(biāo)準包裝： | 24 |
| 系列： | * |
| 其它名稱： | 88P8344BHI |
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IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
4. DATAPATH AND FLOW CONTROL
The following sections describe the datapaths through the device. The
datapaths shown are as follows:
- SPI-3A <-> SPI-4
- SPI-3B <-> SPI-4
- SPI-3C <-> SPI-4
- SPI-3D <-> SPI-4
- SPI-3A <-> SPI-3B
- SPI-3C <-> SPI-3D
- SPI-3A <-> microprocessor interface
- SPI-3B <-> microprocessor interface
- SPI-3C <-> microprocessor interface
- SPI-3D <-> microprocessor interface
- SPI-4 <-> microprocessor interface
Where <-> indicates a bidirectional data path.
TheIDT88P8344supportsfourSPI-3interfacesandasingleSPI-4interface.
All SPI-3 interfaces can operate independently in a PHY or Link mode. Refer
to Figure 11, Definition of Data Flows for the main data flows in the device.
Independent logical data flows are transported over each of the physical ports.
Those logical flows are identified by logical port addresses on the physical port
and by a Link identification (LID) map in the core of the IDT88P8344.
DATA BUFFER ALLOCATION
Flexibilityhasbeenprovidedtotheuserfordatabufferallocation.Thedevice
has128KByteofonchipmemoryperSPI-3portperdirection–atotalof1MByte
of on-chip data memory.
The 128 KByte SPI-3 buffers (8 instantiations per device) are divided into
256 byte segments. The segments are controlled by a packet fragment
processor. The user configures the maximum number of segments per LP to
allocatetoaportandthenumberofsegmentsallocatedfromthebuffersegment
pool that will trigger the flow control mechanism. There is no limitation on the
reallocation of freed segments among logical ports, as would be present if the
memory had been allocated by a simple address mechanism.
Figure 11. Definition of data flows
6370 drwXA
SPI-3A physical port
SPI-4
to SPI-3
from SPI-3
to SPI-4
from SPI-4
SPI-3 egress
SPI-3 ingress
SPI-4 ingress
SPI-4 egress
SPI-3-4 path
SPI-4-3 path
physical
port
SPI-3B physical port
SPI-3C physical port
SPI-3D physical port
SPI-3 extract
SPI-3 insert
SPI-4 insert
SPI-4 extract
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