AT86RF212
6 Functional Description
6.1 Introduction – IEEE 802.15.4-2006 Frame Format
Figure 6-1 provides an overview of the physical layer (PHY) frame structure as defined
by the IEEE 802.15.4-2006 standard.
Figure 6-2 shows the medium access control
layer (MAC) frame structure.
Figure 6-1. IEEE 802.15.4 Frame Format – PHY Layer Frame Structure
6.1.1 PHY Protocol Data Unit (PPDU)
6.1.1.1 Synchronization Header (SHR)
The SHR consists of a four-octet preamble field (all zero), followed by a single octet
start-of-frame delimiter (SFD). During transmit, the SHR is automatically generated by
the AT86RF212, thus the Frame Buffer shall contain PHR and PSDU only, see section
The transmission of the SHR requires 40 symbols for a transmission with BPSK
modulation and 10 symbols for a transmission with O-QPSK modulation.
Table 6-1illustrates the SHR duration depending on the selected data rate, see also section
10.5.
As the SPI data rate is usually higher than the over-the-air data rate, this allows the
microcontroller to initiate a transmission before the frame buffer write access is
completed.
During frame reception, the SHR is used for synchronization purposes. The matching
SFD determines the beginning of the PHR and the following PSDU payload data.
6.1.1.2 PHY Header (PHR)
The PHY header is a single octet following the SHR. The least significant 7 bits denote
the frame length of the following PSDU, while the most significant bit of that octet is
reserved and shall be set to 0 for IEEE 802.15.4 compliant frames. Even though the
MSB is reserved, AT86RF212 is able to transmit and receive this bit.
In transmit mode, the PHR needs to be supplied as the first octet during Frame Buffer
write access, see section
4.3.2.In receive mode, the PHR is returned as the first octet during Frame Buffer read
access, see section
4.3.2.
6.1.1.3 PHY Payload (PHY Service Data Unit, PSDU)
The PSDU has a variable length between one and 127 octets. The PSDU contains the
MAC protocol data unit (MPDU), where the last two octets are used for the Frame
Check Sequence (FCS), see section
6.3.
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