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| 型號(hào)： | IR80C52CXXX-12:RD |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44 |
| 文件頁(yè)數(shù)： | 62/101頁(yè) |
| 文件大?。?/td> | 3398K |
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86
8168C-MCU Wireless-02/10
AT86RF212
Table 6-29. CCA Measurement Period and Access in BUSY_RX State
CCA Mode
Request within ED Measurement
(1)
Request after ED Measurement
Energy above threshold
1
CCA result is available after finishing
automated ED measurement period.
CCA result is immediately available
after request.
Carrier sense only
2
CCA result is immediately available after request.
Carrier sense with energy above threshold (AND)
3
CCA result is available after finishing
automated ED measurement period.
CCA result is immediately available
after request.
Carrier sense with energy above threshold (OR)
0
CCA result is available after finishing
automated ED measurement period.
CCA result is immediately available
after request.
Note:
1. After detecting the SHR, an automated ED measurement is started with a length of
8 symbol periods (2 symbol periods for high rate PHY modes). This automated ED
measurement must be finished to provide a result for the CCA measurement. Only
one automated ED measurement per frame is performed.
It is recommended to perform CCA measurements in RX_ON state only. To avoid
switching accidentally to BUSY_RX state, the SHR detection can be disabled by setting
register bit RX_PDT_DIS (register 0x15, RX_SYN), refer to section 7.2.3. The receiver
remains in RX_ON state to perform a CCA measurement until the register bit
RX_PDT_DIS is set back to continue the frame reception. In this case, the CCA
measurement duration is 8 symbol periods.
6.6.6 Register Description
Register 0x01 (TRX_STATUS):
Two register bits of register 0x01 (TRX_STATUS) indicate the status of the CCA
measurement.
Table 6-30. Register 0x01 (TRX_STATUS)
Bit
7
6
5
4
Name
CCA_DONE
CCA_STATUS
Reserved
TRX_STATUS[4]
Read/Write
R
Reset Value
0
Bit
3
2
1
0
Name
TRX_STATUS[3]
TRX_STATUS[2]
TRX_STATUS[1]
TRX_STATUS[0]
Read/Write
R
Reset Value
0
Bit 7 – CCA_DONE
This register indicates completion a CCA measurement, which is additionally indicated
by the interrupt IRQ_4 (CCA_ED_DONE). Note that register bit CCA_DONE is cleared
in response to a CCA_REQUEST.
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