參數(shù)資料
型號: IR80C52CXXX-12:RD
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44
文件頁數(shù): 80/101頁
文件大?。?/td> 3398K
31
8168C-MCU Wireless-02/10
AT86RF212
5.1.1 State Control
The radio transceiver states are controlled either by writing commands to register bits
TRX_CMD
(register
0x02,
TRX_STATE),
or
directly
by
two
signal
pins:
pin 11 (SLP_TR) and pin 8 (/RST). A successful state change can be verified by
reading the radio transceiver status from register 0x01 (TRX_STATUS).
If TRX_STATUS = 0x1F (STATE_TRANSITION_IN_PROGRESS), the AT86RF212 is
in a state transition. Do not try to initiate a further state change while the radio
transceiver is in STATE_TRANSITION_IN_PROGRESS.
Pin SLP_TR is a multifunctional pin, refer to section 4.6. Depending on the radio
transceiver state, a rising edge of pin SLP_TR causes the following state transitions:
TRX_OFF
SLEEP
RX_ON
RX_ON_NOCLK
PLL_ON
BUSY_TX
whereas the falling edge of pin SLP_TR causes the following state transitions:
SLEEP
TRX_OFF
RX_ON_NOCLK
RX_ON
Pin 8 (/RST) causes a reset of all registers (register bits CLKM_CTRL are shadowed;
for details, refer to section 7.7.4) and the content of the SRAM is deleted. It forces the
radio transceiver into TRX_OFF state. However, if the device was in P_ON state, it
remains in P_ON state.
For all states except SLEEP, the state change commands FORCE_TRX_OFF or
TRX_OFF lead to a transition into TRX_OFF state. If the radio transceiver is in active
receive or transmit states (BUSY_*), the command FORCE_TRX_OFF interrupts these
active processes and forces an immediate transition to TRX_OFF. By contrast, a
TRX_OFF command is stored until an active state (receiving or transmitting) has been
finished. After that the transition to TRX_OFF is performed.
For a fast transition from receive or active transmit states to PLL_ON state, the
command FORCE_PLL_ON is provided. Active processes are interrupted. In contrast
to FORCE_TRX_OFF, this command does not disable the PLL and the analog voltage
regulator AVREG. It is not available in states SLEEP, P_ON, RESET, and all *_NOCLK
states.
The completion of each requested state change shall always be confirmed by reading
the register bits TRX_STATUS (register 0x01, TRX_STATUS).
5.1.2 Description
5.1.2.1 P_ON – Power-on after VDD
When the external supply voltage (VDD) is applied first to the AT86RF212, the radio
transceiver goes into P_ON state performing an on-chip reset. The crystal oscillator is
activated and the default 1 MHz master clock is provided at pin 17 (CLKM) after the
crystal oscillator has stabilized. CLKM can be used as a clock source to the
microcontroller. The SPI interface and digital voltage regulator are enabled.
The on-chip power-on reset sets all registers to their default values. A dedicated reset
signal from the microcontroller at pin 8 (/RST) is not necessary but recommended for
hardware/software synchronization reasons.
All digital inputs have pull-up or pull-down resistors during P_ON state, refer to section
2.2.2.2. This is necessary to support microcontrollers where GPIO signals are floating
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