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參數(shù)資料
| 型號： | IR80C52CXXX-12:RD |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44 |
| 文件頁數(shù)： | 91/101頁 |
| 文件大?。?/td> | 3398K |
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32
8168C-MCU Wireless-02/10
AT86RF212
after power-on or reset. The input pull-up and pull-down resistors are disabled when the
radio transceiver leaves P_ON state. Leaving P_ON state, outputs pins DIG1/DIG2 are
internally connected to digital ground, whereas pins DIG3/DIG4 are internally connected
to analog ground, unless their configuration is changed. A reset at pin 8 (/RST) does
not enable the pull-up or pull-down resistors.
Prior to leaving P_ON, the microcontroller must set the input pins to the default
operating values: SLP_TR = L, /RST = H, and /SEL = H.
All interrupts are disabled by default. Thus, interrupts for state transition control are to
be enabled first, e.g. enable IRQ_4 (AWAKE_END) to indicate a state transition to
TRX_OFF state. In P_ON state, a first access to the radio transceiver registers is
possible after a default 1 MHz master clock is provided at pin 17 (CLKM), refer to tTR1 in
Once the supply voltage has stabilized and the crystal oscillator has settled (see tTR15 in
Table 5-2), the interrupt mask for the AWAKE_END should be set. A valid SPI write
access to register bits TRX_CMD (register 0x02, TRX_STATE) with the command
TRX_OFF or FORCE_TRX_OFF initiates a state change from P_ON towards
TRX_OFF state, which is then indicated by an AWAKE_END interrupt if enabled.
5.1.2.2 SLEEP – Sleep State
In SLEEP state, the entire radio transceiver is disabled; no circuitry is operating. The
radio transceiver current consumption is reduced to leakage current plus the current of
a low power voltage regulator (typ. 100 nA). This regulator provides the supply voltage
for the registers such that the contents of them remain valid. SLEEP can only be
entered from state TRX_OFF by setting SLP_TR = H.
If CLKM is enabled, the SLEEP state is entered 35 CLKM cycles after the rising edge at
pin 11 (SLP_TR). At that time CLKM is turned off. If the CLKM output is already turned
off (bits CLKM_CTRL = 0 in register 0x03), the SLEEP state is entered immediately.
At clock rates of 250 kHz and symbol clock rate (CLKM_CTRL values 6 and 7; register
0x03, TRX_CTRL_0), the main clock at pin 17 (CLKM) is turned off immediately.
Setting SLP_TR = L returns the radio transceiver back to the TRX_OFF state. During
SLEEP, the register contents remains valid while the content of the Frame Buffer and
the security engine (AES) are cleared.
/RST = L in SLEEP state returns the radio transceiver to TRX_OFF state and thereby
sets all registers to their default values. Exceptions are register bits CLKM_CTRL
(register 0x03, TRX_CTRL_0). These register bits require a specific treatment; for
details see section 7.7.4.
5.1.2.3 TRX_OFF – Clock State
In TRX_OFF, the crystal oscillator is running and the master clock is available at
pin 17 (CLKM). The SPI interface and digital voltage regulator are enabled, thus the
radio transceiver registers, the Frame Buffer, and security engine (AES) are accessible
In contrast to P_ON state, pull-up and pull-down resistors are disabled.
Note that the analog front-end is disabled during TRX_OFF. If TRX_OFF_AVDD_EN
(register 0x0C, TRX_CTRL_2) is set, the analog voltage regulator is turned on, enabling
faster switch to any transmit/receive state.
Entering the TRX_OFF state from P_ON, SLEEP, or RESET state, the state change is
indicated by interrupt IRQ_4 (AWAKE_END) if enabled.
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