參數(shù)資料
型號： ISP1563BM,557
廠商： ST-ERICSSON
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP100
封裝： 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-420-1, LQFP-100
文件頁數(shù)： 52/102頁
文件大?。?/td> 466K
代理商： ISP1563BM,557
ISP1563_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 15 March 2007
53 of 102
NXP Semiconductors
ISP1563
HS USB PCI Host Controller
11.1.17 HcPeriodicStart register
This register has a 14-bit programmable value that determines when is the earliest time
for the Host Controller to start processing the periodic list. For bit allocation, see Table 75.
[1]
The reserved bits should always be written with the reset value.
11.1.18 HcLSThreshold register
This register contains an 11-bit value used by the Host Controller to determine whether to
commit to the transfer of a maximum of 8-byte low-speed packet before EOF. Neither the
Host Controller nor the HCD can change this value. For bit allocation, see Table 77.
Table 75.
HcPeriodicStart - Host Controller Periodic Start register bit allocation
Address: Content of the base address register + 40h
Bit
31
30
29
28
27
26
25
24
Symbol
reserved[1]
Reset
00000000
Access
R/W
Bit
23
22
21
20
19
18
17
16
Symbol
reserved[1]
Reset
00000000
Access
R/W
Bit
15
14
13
12
11
10
9
8
Symbol
reserved[1]
P_S[13:8]
Reset
00000000
Access
R/W
Bit
7
6
5
4
3
2
1
0
Symbol
P_S[7:0]
Reset
00000000
Access
R/W
Table 76.
HcPeriodicStart - Host Controller Periodic Start register bit description
Address: Content of the base address register + 40h
Bit
Symbol
Description
31 to 14
reserved
-
13 to 0
P_S[13:0]
Periodic Start: After a hardware reset, this eld is cleared. It is then set by the HCD during the
Host Controller initialization. The value is roughly calculated as 10 % of HcFmInterval. A typical
value is 3E67h. When HcFmRemaining reaches the value specied, processing of the periodic lists
have priority over control or bulk processing. The Host Controller, therefore, starts processing the
interrupt list after completing the current control or bulk transaction that is in progress.
Table 77.
HcLSThreshold - Host Controller LS Threshold register bit allocation
Address: Content of the base address register + 44h
Bit
31
30
29
28
27
26
25
24
Symbol
reserved[1]
Reset
00000000
Access
R/W
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ISP1563BMUM 功能描述:IC USB HOST CTRL HI-SPD 128LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2
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