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參數資料
| 型號： | IXF1010 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 10 CHANNEL(S), 1000M bps, LOCAL AREA NETWORK CONTROLLER, CBGA552 |
| 封裝： | 25 X 25 MM, 1 MM PITCH, CERAMIC, BGA-552 |
| 文件頁數： | 56/116頁 |
| 文件大?。?/td> | 1392K |
| 代理商： | IXF1010 |
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IXF1010 — 10-Port 100/1000 Mbps Ethernet MAC
44
Preliminary Datasheet
Document #: 249839
Revision #: 001
Rev. Date: April 29, 2002
When this operation mode is implemented on a board with a shift register chain containing three
74HC595 devices, the LED DATA bit 1 is output on Shift Register bit 1, and so on up the chain.
Only Shift Register bits 31 and 32 do not contain valid data. The actual data shown in Figure 16
consists of a 36-bit chain, of which 30 bits are valid LED DATA. The 36-bit data chain is built up
as follows:
Note:
The LED_DATA signal is now inverted from the state in Mode 0.
3.5.6
Power-On, Reset, and Initialization
The LED interface is disabled at power-on or reset. The system software controller must enable the
LED interface. The internal state machines and output pins are held in reset until the full IXF1010
device configuration is completed. This is done by setting the LED_ENABLE bit to a logic 1 (see
Table 68, “LED Control Register (Addr: 0x509)” on page 92). The power-on default for this bit is
Logic 0.
Figure 16. Mode 1 Timing Diagram
Table 13. Mode 1 Clock Cycle to Data Bit Relationship
LED_CLK CYCLE
LED_DATA NAME
LED_DATA DESCRIPTION
1START BIT
This bit has no meaning in Mode 1 operation and is shifted out
of the 32-stage shift register chain before the LED_LATCH
signal is asserted.
2:3
PAD BITS
These bits have no meaning in Mode 1 operation and are
shifted out of the 32-stage shift register chain before the
LED_LATCH signal is asserted.
4:33
LED DATA 1-30
These bits are the actual data to be transmitted to the 32-stage
shift register chain. The decode for each bit in each mode is
defined in Table 14 on page 45.
The data is INVERTED. Logic 1 (LED ON) = Low.
34:36
PAD BITS
These bits have no meaning in Mode 1 operation and are
latched into positions 31 and 32 in the shift register chain.
These bits are not considered as valid data and should be
ignored. They should always be a Logic 0 = High.
1
23 24 25 26 27 28 29 30
135
23
4
LED_CLK
LED_DATA
LED_LATCH
33
32
31
30
29
28
27
26
34
36
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相關代理商/技術參數 |
參數描述 |
|---|---|
| IXF102A | 功能描述:IRIX II GREY HEADLAMP 5LED FLOOD RoHS:是 類別:工具 >> 閃光燈 系列:Irix™ II 標準包裝:1 系列:- 類型:筆形手電筒 燈類型:LED 燈輸出:- 特點:可變強度 電池大小:AA（需要 1 個） 長度:- 主體材料:- |
| IXF-10A15AF | 制造商:ILSI 制造商全稱:ILSI America LLC 功能描述:Crystal Filter 3 Lead Metal Package |
| IXF-10A15AT | 制造商:ILSI 制造商全稱:ILSI America LLC 功能描述:Crystal Filter 3 Lead Metal Package |
| IXF-10A15BF | 制造商:ILSI 制造商全稱:ILSI America LLC 功能描述:Crystal Filter 3 Lead Metal Package |
| IXF-10A15BT | 制造商:ILSI 制造商全稱:ILSI America LLC 功能描述:Crystal Filter 3 Lead Metal Package |
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