參數(shù)資料
型號: K8D6316UBM-YC08
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
元件分類: DRAM
英文描述: 64M Bit (8M x8/4M x16) Dual Bank NOR Flash Memory
中文描述: 6400位(800萬x8/4M x16)的雙銀行NOR閃存
文件頁數(shù): 41/48頁
文件大小: 767K
代理商: K8D6316UBM-YC08
NOR FLASH MEMORY
K8D6x16UTM / K8D6x16UBM
Revision 1.6
September, 2006
41
Read While Write Operations
SWITCHING WAVEFORMS
Parameter
Symbol
-7
-8
-9
Unit
Min
Max
Min
Max
Min
Max
Write Cycle Time
t
WC
70
-
80
-
90
-
ns
Write Pulse Width
t
WP
35
-
35
-
45
-
ns
Write Pulse Width High
t
WPH
25
-
25
-
30
-
ns
Address Setup Time
t
AS
0
-
0
-
0
-
ns
Address Hold Time
t
AH
45
-
45
-
45
-
ns
Data Setup Time
t
DS
35
-
35
-
45
-
ns
Data Hold Time
t
DH
0
-
0
-
0
-
ns
Read Cycle Time
t
RC
70
-
80
-
90
-
ns
Chip Enable Access Time
t
CE
-
70
-
80
-
90
ns
Address Access Time
t
AA
-
70
-
80
-
90
ns
Output Enable Access Time
t
OE
-
25
-
25
-
35
ns
OE Setup Time
t
OES
0
-
0
-
0
-
ns
OE Hold Time
t
OEH2
10
-
10
-
10
-
ns
CE & OE Disable Time
t
DF
-
16
-
16
-
16
ns
Address Hold Time
t
AHT
0
-
0
-
0
-
ns
CE High during toggle bit polling
t
CEPH
20
-
20
-
20
-
ns
Note :
This is an example in the program-case of the Read While Write function.
DA1 : Address of Bank1, DA2 : Address of Bank 2
PA = Program Address at one bank , RA = Read Address at the other bank, PD = Program Data In , RD = Read Data Out
OE
CE
DQ
WE
t
RC
Read
Command
Command
Read
Read
Read
t
AH
t
AA
t
CE
t
AS
t
AHT
t
AS
t
CEPH
t
OE
t
OES
t
WP
t
OEH2
t
DF
t
DS
t
DH
t
DF
DA1
DA2
(555H)
DA1
DA1
DA2
(PA)
DA2
(PA)
Valid
Output
Valid
Output
Valid
Input
Valid
Output
Valid
Input
Status
Address
(A0H)
(PD)
t
RC
t
RC
t
RC
t
WC
t
WC
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