Analog Integrated Circuit Device Data
12
Freescale Semiconductor
33989
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics
Characteristics noted under conditions 7.0 V
VSUP 18 V, -40C TA 125C, GND = 0 V, unless otherwise noted. Typical
values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
DIGITAL INTERFACE TIMING (SCLK, CS, MOSI, MISO)
SPI Operation Frequency
FREQ
0.25
—
4.0
MHz
SCLK Clock Period
tPCLK
250
—
N/A
ns
SCLK Clock High Time
tWSCLKH
125
—
N/A
ns
SCLK Clock Low Time
tWSCLKH
125
—
N/A
ns
Falling Edge of CS to Rising Edge of SCLK
tLEAD
100
—
N/A
ns
Falling Edge of SCLK to Rising Edge of CS
tLAG
100
—
N/A
ns
MOSI to Falling Edge of SCLK
tSISU
40
—
N/A
ns
Falling Edge of SCLK to MOSI
tSIH
40
—
N/A
ns
MISO Rise Time (CL = 220 pF)
tRSO
—
25
50
ns
MISO Fall Time (CL = 220 pF)
tFSO
—
25
50
ns
Time from Falling or Rising Edges of CS to:
MISO Low-impedance
MISO High-impedance
tSOEN
tSODIS
—
50
ns
Time from Rising Edge of SCLK to MISO Data Valid
0.2 V1 = <MISO> = 0.8 V1, CL = 200 pF
tVALID
—
50
ns
STATE MACHINE TIMING (CS, SCLK, MOSI, MISO, WD, INT)
Delay Between CS Low to High Transition (End of SPI Stop Command) and
Stop Mode Activation Detected by V2 OFF
(24)tCSSTOP
18
—
34
s
Interrupt Low Level Duration
SBC in Stop Mode
tINT
7.0
10
13
s
Internal Oscillator Frequency
All Modes Except Sleep and Stop
(24)OSCF1
—
100
—
kHz
Internal Low Power Oscillator Frequency
Sleep and Stop Modes
(24)OSCF2
—
100
—
kHz
Watchdog Period 1
Normal and Standby Modes
WD1
8.58
9.75
10.92
ms
Watchdog Period 2
Normal and Standby Modes
WD2
39.6
45
50.4
ms
Watchdog Period 3
Normal and Standby Modes
WD3
88
100
112
ms
Watchdog Period 4
Normal and Standby Modes
WD4
308
350
392
ms
Watchdog Period Accuracy
Normal and Standby Modes
f1ACC
-12
—
12
%
Notes
24.
Guaranteed by design; however it is not production tested.