KS8695P Micrel System Clock The clock to the KS8695P is supplied by either a 25MHz ±50ppm crystal or by an o" />
參數(shù)資料
型號(hào): KS8695P-EVAL
廠商: Micrel Inc
文件頁(yè)數(shù): 11/40頁(yè)
文件大小: 0K
描述: BOARD EVAL EXPERIMENT KS8695P
標(biāo)準(zhǔn)包裝: 1
其它名稱: 576-1002
August 2005
19
M9999-081805
KS8695P
Micrel
System Clock
The clock to the KS8695P is supplied by either a 25MHz ±50ppm crystal or by an oscillator. If an oscillator is used, it must
be connected to the XCLK1 input (pin E1) on the KS8695P. If a crystal is used, it must be connected with a circuit similar to
the one shown below. The 25MHz input clock is used by an internal PLL to generate the programmable SDOCLK. SDOCLK
is the system clock and can be programmed from 25MHz to 125MHz using the system clock and bus control register at
offset 0x0004. The CPUCLKSEL strap-in option on pin M15 needs to be pulled low for normal operation. SDICLK is used
to register the data read from the SDRAM back into the KS8695P. The system designer must ensure that SDRAM timing is
met when routing SDOCLK back to SDICLK.
25MHz
Xtal
22pF
XCLK1 XCLK2
E1
E2
SDOCLK
U7
To System
25MHz to 125MHz
URTSN/
CPUCLKSEL
M15
1k
KS8695P
T7
SDICLK
Figure 6. Typical Clock Circuit
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