參數(shù)資料
型號: KSZ8851-16MLLI TR
廠商: Micrel Inc
文件頁數(shù): 16/84頁
文件大?。?/td> 0K
描述: IC MAC CTLR 1PORT W/BUS 48LQFP
標準包裝: 1,000
控制器類型: 以太網(wǎng)控制器,MAC/PHY
接口: 總線
電源電壓: 1.8V,2.5V,3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 帶卷 (TR)
Micrel, Inc.
KSZ8851-16MLL/MLLI
March 11, 2014
23
Revision 2.2
Item
Address
Filtering Mode
Receive Control Register (0x74 – 0x75): RXCR1
Description
RX All
(Bit 4)
RX Inverse
(Bit 1)
RX Physical
Address
(Bit 11)
RX Multicast
Address
(Bit 8)
1
Perfect
0
1
All Rx frames are passed only if the DA exactly matches the
MAC address in MARL, MARM and MARH registers.
2
Inverse perfect
0
1
All Rx frames are passed if the DA is not matching the MAC
address in MARL, MARM and MARH registers.
3
Hash only
0
All Rx frames with either multicast or physical destination
address are filtering against the MAC address hash table.
4
Inverse hash only
0
1
0
All Rx frames with either multicast or physical destination
address are filtering not against the MAC address hash table.
All Rx frames which are filtering out at item 3 (Hash only) only
are passed in this mode.
5
Hash perfect (Default)
0
1
0
All Rx frames are passed with Physical address (DA)
matching the MAC address and to enable receive multicast
frames that pass the hash table when Multicast address is
matching the MAC address hash table.
6
Inverse hash perfect
0
1
0
All Rx frames which are filtering out at item 5 (Hash perfect)
only are passed in this mode.
7
Promiscuous
1
0
All Rx frames are passed without any conditions.
8
Hash only with
Multicast address
passed
1
0
All Rx frames are passed with Physical address (DA)
matching the MAC address hash table and with Multicast
address without any conditions.
9
Perfect with Multicast
address passed
1
0
1
All Rx frames are passed with Physical address (DA)
matching the MAC address and with Multicast address
without any conditions.
10
Hash only with
Physical address
passed
1
0
1
0
All Rx frames are passed with Multicast address matching the
MAC address hash table and with Physical address without
any conditions.
11
Perfect with Physical
address passed
1
0
1
All Rx frames are passed with Multicast address matching the
MAC address and with Physical address without any
conditions.
Notes:
1. Bit 0 (RX Enable), Bit 5 (RX Unicast Enable) and Bit 6 (RX Multicast Enable) must set to 1 in RXCR1 register.
2. The KSZ8851-16MLL will discard frame with SA same as the MAC address if bit[0] is set in RXCR2 register.
Table 3. Address Filtering Scheme
Clock Generator
The X1 and X2 pins are connected to a 25MHz crystal. X1 can also serve as the connector to a 3.3V, 25MHz oscillator
(as described in the pin description).
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