- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄1931 > KSZ8851-16MLLI TR (Micrel Inc)IC MAC CTLR 1PORT W/BUS 48LQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | KSZ8851-16MLLI TR |
| 廠(chǎng)商： | Micrel Inc |
| 文件頁(yè)數(shù)： | 3/84頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MAC CTLR 1PORT W/BUS 48LQFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 控制器類(lèi)型： | 以太網(wǎng)控制器，MAC/PHY |
| 接口： | 總線(xiàn) |
| 電源電壓： | 1.8V，2.5V，3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 帶卷 (TR) |
第1頁(yè)第2頁(yè)當(dāng)前第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)
Micrel, Inc.
KSZ8851-16MLL/MLLI
March 11, 2014
11
Revision 2.2
Pin Description (Continued)
Pin Number
Pin Name
Type
Pin Function
12
CSN
IPU
Chip Select Not
Chip select for the shared data bus access enable, active Low.
13
AGND
GND
Analog ground
14
VDD_A1.8
P
1.8V analog power supply from VDD_CO1.8 (pin 8) with appropriate filtering. If VDD_IO is
1.8V, this pin must be supplied power from the same source as pins 27, 38 and 46
(VDD_IO) with appropriate filtering.
15
EECS
OPD
EEPROM Chip Select
This signal is used to select an external EEPROM device.
16
RXP1
I/O
Port 1 physical receive signal (+ differential).
17
RXM1
I/O
Port 1 physical receive signal (– differential).
18
AGND
GND
Analog ground.
19
TXP1
I/O
Port 1 physical transmit signal (+ differential).
20
TXM1
I/O
Port 1 physical transmit signal (– differential).
21
VDD_A3.3
P
3.3V analog VDD input power supply with well decoupling capacitors.
22
ISET
O
Set physical transmits output current.
Pull-down this pin with a 3.01K 1% resistor to ground.
23
RSTN
IPU
Reset Not
Hardware reset pin (active Low). This reset input is required minimum of 10ms low after
stable supply voltage 3.3V.
24
X1
I
25MHz crystal or oscillator clock connection.
Pins (X1, X2) connect to a crystal. If an oscillator is used, X1 connects to a 3.3V tolerant
oscillator and X2 is a no connect.
Note: Clock requirement is ±50ppm for either crystal or oscillator.
25
X2
O
26
DGND
GND
Digital ground
27
VDD_IO
P
3.3V, 2.5V or 1.8V digital VDD input power supply for IO with well decoupling capacitors.
28
DGND
GND
Digital ground
29
VDD_D1.8
P
1.8V digital power supply from VDD_CO1.8 (pin 8) with appropriate filtering. If VDD_IO is
1.8V, this pin must be supplied power from the same source as pins 27, 38 and 46
(VDD_IO) with appropriate filtering.
30
SD15
I/O (PD)
Shared Data Bus bit 15. Data D15 access when CMD=0. Byte Enable 3 at double-word
boundary access (BE3, 4th byte enable and active high) in 16-bit mode when CMD=1.
This pin must be tied to GND in 8-bit bus mode.
31
SD14
I/O (PD)
Shared Data Bus bit 14. Data D14 access when CMD=0. Byte Enable 2 at double-word
boundary access (BE2, 3rd byte enable and active high) in 16-bit mode when CMD=1.
This pin must be tied to GND in 8-bit bus mode.
32
SD13
I/O (PD)
Shared Data Bus bit 13. Data D13 access when CMD=0. Byte Enable 1 at double-word
boundary access (BE1, 2nd byte enable and active high) in 16-bit mode when CMD=1.
This pin must be tied to GND in 8-bit bus mode.
33
SD12
I/O (PD)
Shared Data Bus bit 12. Data D12 access when CMD=0. Byte Enable 0 at double-word
boundary access (BE0, 1st byte enable and active high) in 16-bit mode when CMD=1.
This pin must be tied to GND in 8-bit bus mode.
34
SD11
I/O (PD)
Shared Data Bus bit 11. Data D11 access when CMD=0. Do Not Care when CMD=1. This
pin must be tied to GND in 8-bit bus mode.
35
SD10
I/O (PD)
Shared Data Bus bit 10. Data D10 access when CMD=0. Do Not Care when CMD=1. This
pin must be tied to GND in 8-bit bus mode.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KSZ8851-16MLLJ | IC CTLR MAC 1PORT NON-PCI 48LQFP |
| KSZ8851-32MQLI | IC CTLR MAC/PHY NON PCI 128PQFP |
| KSZ8851-32MQL | IC CTLR MAC/PHY NON PCI 128PQFP |
| KSZ8851SNLI TR | IC ETHERNET CTLR 1PORT PCI 32MLF |
| KSZ8862-16MQL | IC SWITCH 10/100 16BIT 128-PQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KSZ8851-16MLLJ | 功能描述:以太網(wǎng) IC Single-Port Ethernet MAC Controller with 8/16-Bit Non-PCI Interface (125C support) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8851-16MLLJ_10 | 制造商:MICREL 制造商全稱(chēng):Micrel Semiconductor 功能描述:Single-Port Ethernet MAC Controller with 8-Bit or 16-Bit Non-PCI Interface |
| KSZ8851-16MLLU | 功能描述:以太網(wǎng) IC Single-Port Ethernet Controller (Automotive Grade) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8851-16MLLU TR | 功能描述:以太網(wǎng) IC Single-Port Ethernet Controller (Automotive Grade) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8851-16MQL | 功能描述:以太網(wǎng) IC Single Ethernet Port + Generic (16-bit) Bus Interface(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。