參數(shù)資料
型號: KSZ8851-16MLLI TR
廠商: Micrel Inc
文件頁數(shù): 44/84頁
文件大?。?/td> 0K
描述: IC MAC CTLR 1PORT W/BUS 48LQFP
標準包裝: 1,000
控制器類型: 以太網(wǎng)控制器,MAC/PHY
接口: 總線
電源電壓: 1.8V,2.5V,3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 帶卷 (TR)
2002 Microchip Technology Inc.
DS30325B-page 47
PIC16F7X
6.0
TIMER1 MODULE
The Timer1 module is a 16-bit timer/counter consisting
of two 8-bit registers (TMR1H and TMR1L), which are
readable and writable. The TMR1 Register pair
(TMR1H:TMR1L) increments from 0000h to FFFFh
and rolls over to 0000h. The TMR1 Interrupt, if enabled,
is generated on overflow, which is latched in interrupt
flag bit TMR1IF (PIR1<0>). This interrupt can be
enabled/disabled by setting/clearing TMR1 interrupt
enable bit TMR1IE (PIE1<0>).
Timer1 can operate in one of two modes:
As a timer
As a counter
The operating mode is determined by the clock select
bit, TMR1CS (T1CON<1>).
In Timer mode, Timer1 increments every instruction
cycle. In Counter mode, it increments on every rising
edge of the external clock input.
Timer1 can be enabled/disabled by setting/clearing
control bit TMR1ON (T1CON<0>).
Timer1 also has an internal “RESET input”. This
RESET can be generated by either of the two CCP
modules as the special event trigger (see Sections 8.1
and 8.2). Register 6-1 shows the Timer1 Control
register.
When the Timer1 oscillator is enabled (T1OSCEN is
set), the RC1/T1OSI/CCP2 and RC0/T1OSO/T1CKI
pins become inputs. That is, the TRISC<1:0> value is
ignored and these pins read as ‘0’.
Additional information on timer modules is available in
the PICmicro Mid-Range MCU Family Reference
Manual (DS33023).
REGISTER 6-1:
T1CON: TIMER1 CONTROL REGISTER (ADDRESS 10h)
U-0
R/W-0
T1CKPS1 T1CKPS0 T1OSCEN
T1SYNC
TMR1CS
TMR1ON
bit 7
bit 0
bit 7-6
Unimplemented: Read as ‘0’
bit 5-4
T1CKPS1:T1CKPS0: Timer1 Input Clock Prescale Select bits
11
= 1:8 Prescale value
10
= 1:4 Prescale value
01
= 1:2 Prescale value
00
= 1:1 Prescale value
bit 3
T1OSCEN: Timer1 Oscillator Enable Control bit
1
= Oscillator is enabled
0
= Oscillator is shut-off (the oscillator inverter is turned off to eliminate power drain)
bit 2
T1SYNC: Timer1 External Clock Input Synchronization Control bit
TMR1CS = 1:
1
= Do not synchronize external clock input
0
= Synchronize external clock input
TMR1CS = 0:
This bit is ignored. Timer1 uses the internal clock when TMR1CS = 0.
bit 1
TMR1CS: Timer1 Clock Source Select bit
1
= External clock from pin RC0/T1OSO/T1CKI (on the rising edge)
0
= Internal clock (FOSC/4)
bit 0
TMR1ON: Timer1 On bit
1
= Enables Timer1
0
= Stops Timer1
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR reset
’1’ = Bit is set
’0’ = Bit is cleared
x = Bit is unknown
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