參數(shù)資料
型號: KSZ8873FLLI
廠商: Micrel Inc
文件頁數(shù): 41/115頁
文件大?。?/td> 0K
描述: IC ETHERNET SWITCH 3PORT 64LQFP
產(chǎn)品培訓(xùn)模塊: KSZ8873 Ethernet Switches
標(biāo)準(zhǔn)包裝: 160
控制器類型: 以太網(wǎng)開關(guān)控制器
接口: MII
電源電壓: 1.8V,2.5V,3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-LQFP(10x10)
包裝: 托盤
其它名稱: 576-3632
KSZ8873FLLI-ND
Micrel, Inc.
KSZ8873MLL/FLL/RLL
September 20, 2013
31
Revision 1.6
To avoid jabber and excessive deference (as defined in the 802.3 standard), after a certain time, the
KSZ8873MLL/FLL/RLL discontinues the carrier sense and then raises it again quickly. This short silent time (no carrier
sense) prevents other stations from sending out packets thus keeping other stations in a carrier sense deferred state. If
the port has packets to send during a backpressure situation, the carrier sense type backpressure is interrupted and those
packets are transmitted instead. If there are no additional packets to send, carrier sense type backpressure is reactivated
again until switch resources free up. If a collision occurs, the binary exponential back-off algorithm is skipped and carrier
sense is generated immediately, thus reducing the chance of further collisions and carrier sense is maintained to prevent
packet reception.
To ensure no packet loss in 10 BASE-T or 100 BASE-TX half duplex modes, the user must enable the following:
1.
Aggressive back-off (Register 3 (0x03), bit [0])
2.
No excessive collision drop (Register 4 (0x04), bit [3])
Note: These bits are not set as defaults, as this is not the IEEE standard.
Broadcast Storm Protection
The KSZ8873MLL/FLL/RLL has an intelligent option to protect the switch system from receiving too many broadcast
packets. As the broadcast packets are forwarded to all ports except the source port, an excessive number of switch
resources (bandwidth and available space in transmit queues) may be utilized. The KSZ8873MLL/FLL/RLL has the option
to include “multicast packets” for storm control. The broadcast storm rate parameters are programmed globally, and can
be enabled or disabled on a per port basis. The rate is based on a 67ms interval for 100BT and a 500ms interval for
10BT. At the beginning of each interval, the counter is cleared to zero, and the rate limit mechanism starts to count the
number of bytes during the interval. The rate definition is described in Register 6 (0x06) and 7 (0x07). The default setting
is 0x63 (99 decimal). This is equal to a rate of 1%, calculated as follows:
148,800 frames/sec * 67ms/interval * 1% = 99 frames/interval (approx.) = 0x63
Note: 148,800 frames/sec is based on 64-byte block of packets in 100BASE-TX with 12 bytes of IPG and 8 bytes of
preamble between two packets.
Port Individual MAC Address and Source Port Filtering
The KSZ8873MLL/FLL/RLL provide individual MAC address for port 1 and port 2 respectively. They can be set at Register
142-147 and 148-153. With this feature, the CPU connected to the port 3 can receive the packets from two internet
subnets which has their own MAC address.
The packet will be filtered if its source address matches the MAC address of port 1 or port 2 when the Register 21 and 37
bit 6 is set to 1 respectively. For example, the packet will be dropped after it completes the loop of a ring network.
MII Interface Operation
The media independent interface (MII) is specified in Clause 22 of the IEEE 802.3u Standard. It provides a common
interface between physical layer and MAC layer devices. The MII provided by the KSZ8873MLL/FLL is connected to the
device’s third MAC. The interface contains two distinct groups of signals: one for transmission and the other for reception.
Table 4 describes the signals used by the MII bus.
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