參數資料
型號: KSZ8873FLLI
廠商: Micrel Inc
文件頁數: 43/115頁
文件大?。?/td> 0K
描述: IC ETHERNET SWITCH 3PORT 64LQFP
產品培訓模塊: KSZ8873 Ethernet Switches
標準包裝: 160
控制器類型: 以太網開關控制器
接口: MII
電源電壓: 1.8V,2.5V,3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應商設備封裝: 64-LQFP(10x10)
包裝: 托盤
其它名稱: 576-3632
KSZ8873FLLI-ND
Micrel, Inc.
KSZ8873MLL/FLL/RLL
September 20, 2013
33
Revision 1.6
provided by the KSZ8873RLL internally and the REFCLKI_3 pin is unconnected. For the external reference clock, the
clock will provide to KSZ8873RLL via REFCLKI_3.
Note: If the reference clock is not provided by the KSZ8873RLL, this 50MHz reference clock has to be used in X1 pin
instead of the 25MHz crystal since the clock skew of these two clock sources will impact on the RMII timing. The SPIQ
clock selection strapping option pin is connected to low to select the 50MHz input.
Table 5. RMII Clock Setting
Reg198[3]
EN_REFCLKO_3
Clock Source
Note
0
External 50MHz OSC input to REFCLKI_3
EN_REFCLKO_3 = 0 to Disable
REFCLKO_3 for better EMI
0
1
REFCLKO_3 Output Is Feedback to REFCLKI_3
EN_REFCLKO_3 = 1 to Enable
REFCLKO_3
1
Internal Clock Source
REFCLKI_3 is unconnected
EN_REFCLKO_3 = 1 to Enable
REFCLKO_3
1
0
Not suggested
The RMII provided by the KSZ8873RLL is connected to the device’s third MAC. It complies with the RMII Specification.
Table 6 describes the signals used by the RMII bus. Refer to RMII Specification for full detail on the signal description.
Table 6. RMII Signal Description
RMII Signal Name
Direction
(with respect
to the PHY)
Direction
(with respect
to the MAC)
RMII Signal Description
KSZ8873RLL
RMII Signal (direction)
REF_CLK
Input
Input or
Output
Synchronous 50 MHz clock
reference for receive, transmit
and control interface
REFCLKI_3 (input)
CRS_DV
Output
Input
Carrier sense/Receive data valid
SMRXDV3 (output)
RXD1
Output
Input
Receive data bit 1
SMRXD31 (output)
RXD0
Output
Input
Receive data bit 0
SMRXD30 (output)
TX_EN
Input
Output
Transmit enable
SMTXEN3 (input)
TXD1
Input
Output
Transmit data bit 1
SMTXD31 (input)
TXD0
Input
Output
Transmit data bit 0
SMTXD30 (input)
RX_ER
Output
Input
(not required)
Receive error
(not used)
SMTXER3* (input)
* Connects to RX_ER signal
of RMII PHY device
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