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參數(shù)資料
| 型號： | L64118 |
| 廠商： | LSI CORP |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA256 |
| 封裝： | PLASTIC, BGA-256 |
| 文件頁數(shù)： | 5/68頁 |
| 文件大?。?/td> | 877K |
| 代理商： | L64118 |
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L64118 MPEG-2 Transport Controller with Embedded MIPS CPU (TR4101) 13
One IEEE1284 parallel communication port for fast communication
with a PC or workstation. The L64118 includes an on-chip DMA
controller dedicated for data transfers between the IEEE1284 parallel
communication port and the main memory.
One I2C-compatible serial communication port to communicate with
devices using I2C data links. This type of bus is common in video
encoders, audio DACs, remote control devices, and RF tuners.
Two independent SmartCard ports ISO-7816-3 compliant SmartCard
ports interface through a SmartCard coupler, and support the T = 0,
T = 1 asynchronous protocol. The ports also feature VCC,VPP
control.
One Teletext port that interfaces to an NTSC or PAL encoder and
allows for direct insertion of teletext data into an NTSC or PAL video
encoder device. The teletext data usually is transmitted using a
special-purpose PID. The data is then extracted by the Transport
processor and posted to SDRAM. Finally, the L64118 controller
transfers the teletext data to the Teletext port upon request from the
video encoder device. The Teletext port includes a FIFO between the
real-time timing required on the output pins and the internal data
transfer.
An Aux parallel port for outputting/inputting transport packets from/to
the internal demultiplexer. The port’s direction is controlled through a
conguration bit or through the AUXTX input pin. The port can be
programmed to deliver or receive transport packets at various points
within the demultiplexer’s pipeline. This port is multiplexed with
signals from the IEEE1284 port.
An Infrared port with a single IR blaster with two identical output pins
and two identical, yet independent, IR receiver modules. The IRT
(transmitter) can be used to communicate with off-board elements
(e.g., to program a VCR). The two IR receivers, IR0 and IR1, support
remote control of the STB.
Forty-seven general-purpose I/O pins (GPIOs) are congurable and
can be used to control and monitor a subset of processor functions,
thus easing system integration and minimizing external glue logic.
Forty-one of these I/Os are multiplexed, six are dedicated GPIOs.
118bds Page 13 Wednesday, February 3, 1999 12:37 PM
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