參數(shù)資料
型號: L6460TR
廠商: STMICROELECTRONICS
元件分類: 運動控制電子
英文描述: STEPPER MOTOR CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1 MM HEIGHT, ROHS COMPLIANT, TQFP-64
文件頁數(shù): 41/139頁
文件大?。?/td> 3837K
代理商: L6460TR
L6460
Schematic examples
Doc ID 17713 Rev 1
135/139
25
Schematic examples
Figure 49.
Application with 2 DC motors, 1 stepper motor and 3 power supplies
R4
0
560
+
C2
7
10uF
10V
V3v
3
Device
ID
R2
5
3.
9
DC1_plus
C2
9
100nF
JP
5
1
2
3
nSS
JP
9
R3
9
Open
AW
AKE
R4
3
22K
R7
4.
7K
CO
N3
1
2
3
Gpio4
D6
LED
1.2V
0.5
A
C2
2
1nF
DC2_plus
M
OSI
+
C1
6
680uF
50V
C2
3
1nF
C5
680nF
Gpio2
Gpio12
Gpio1
R2
3
2.
2
C1
0
100nF
C8
100nF
SC
LK
+
3_3VS
C2
1
1nF
R3
8
Open
C
1
100nF
C1
5
100pF
VLINMAI
N
M
OSI
DC2_minus
R4
4
39K
J9
1
2
R2
2
1
JP
6
1
2
3
C
3
1uF
1210
R1
5
1
K
Vs
upply
R3
7
2.
2K
Gpio6
Gpio11
+
C2
6
330uF
25V
J5
1
2
J1
CO
N5
X
2
1
3
5
7
9
2
4
6
8
10
J6
1
2
R3
6
2.
2K
GND
SC
LK
R2
7
1
R2
0
1
K
DC1_minus
V3v
3
Gpio14
L2
33uH
4
.5
A
C
oilc
raf
t
D
O5040H
-333M
L
D
D7
6C
W
Q06
MI
S
O
Gpio12
R1
2
330
D4
LED
J
P11
J3
1
2
R
ESET
Gpio13
C1
2
100pF
VSWDRV
ID1
Gpio10
R2
6
2.
2
Gpio5
Gpio0
R
ESET
R1
8
1K
Q5
ST
D
1
2N
F
06L
AW
AKE
J
P13
R2
1
1K
GND
nSS
+
3_3VS
JP
1
2
3
JP
3
1
2
3
ID2
Gpio8
D5
LED
C1
4
100nF
R
1
330
J
P16
C
9
100nF
R1
3
330
Vs
upply
Close
on
Maste
r
C2
1uF
JP
4
1
2
3
J1
0
CO
N1
7
X
2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
Gpio14
J8
1
2
D3
ST
PS3L60U
C3
1
100nF
R3
4
.7
K
Vs
upply
D2
LED
Vsuppl
y
12V
3A
J4
1
2
+
3_3VS
D1
LED
C1
1uF
C2
8
330nF
nSS
J2
1
2
JP
8
M
OSI
C2
0
1nF
nAW
AKE
J1
1
CO
N1
0
1
2
3
4
5
6
7
8
9
10
C1
8
1nF
GND
nSS
R4
1
1K
Q2
BC
846B
2
3
1
MI
S
O
R1
9
1
K
C2
4
1nF
+
3_3VS
GND
+
3_3VS
J
P12
nR
ESET
C1
3
100nF
V3v
3
U1
17
18
19
20
27
28
23
25
24
22
21
26
29
30
31
32
33
34
37
36
35
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
61
62
60
58
59
63
64
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
65
66
67
68
69
70
71
72
73
D
C
2_plus
Vs
upply
MI
S
O
M
OSI
VR
EF
_F
B
IR
EF
_F
B
Gpio8
Vs
upply
VSW
m
ain_SW
VLI
N
m
ain_OU
T
VLI
N
m
ain_F
B
VSW
m
ain_F
B
SC
LK
Vs
upply
N.C
D
C
4_plus
DC4_sense
nAWAKE
Gpio14
Gpio13
Gpio12
DC4_minus
DC4_sense
DC3_sense
DC3_minus
N.C.
Gpio11
Gpio10
Gpio9
Gpio5
DC3_sense
N.C
D
C
3_plus
Vs
upply
nR
ESET
V3v
3
Vs
upply
In
t
Gpio7
VGPI
O_SPI
Gpio6
CP
H
CP
L
Vpum
p
VSW
D
R
V_SW
VSW
D
R
V_gat
e
Vs
upply
D
C
1_plus
TA
B
TA
B
TA
B
TA
B
TA
B
TAB
Gpio6
Vs
upply
R2
4.
7K
Gpio1
Stepper
R8
4.
7K
GND
nR
ESET
JP
2
1
2
3
R2
4
3.
9
C1
9
1nF
J7
1
2
R1
4.
7K
Gpio7
SC
LK
Gpio8
Phase
A
C
7
100nF
Slave
3.3V
2.5
A
Gpio3
+
3_3VS
J
P14
JP
7
Q3
BC
846B
2
3
1
R6
4.
7K
Gpio5
R1
6
1
K
R9
4.
7K
C1
7
1nF
+
3_3VS
nR
ESET
R1
7
1
K
Phase
B
Gpio13
VSWMAI
N
nAW
AKE
L1
33uH
3
A
C
oilc
raf
t
D
O5010H
-333M
L
D
Q1
BC
846B
2
3
1
Gpio2
Q4
BSP51
R1
4
1K
Gpio9
Gpio7
J
P15
Start
up
configuratio
n
C4
1uF
R
5
4.
7K
+
C2
5
470uF
16V
C6
100nF
R1
0
4.
7K
Master
Gpio11
MI
S
O
R4
2
0.
047
1W
L6460
DC1_plus
VSWDRV_sns
VSWDRV_FB
Gpio4
Gpio3
DC1_minus
GND1
GND2
DC2_minus
Gpio2
Gpio1
Gpio0
nSS
DC2_plus
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