參數(shù)資料
型號(hào): LAN83C185-JT
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 網(wǎng)絡(luò)接口
英文描述: HIGH PERFORMANCE SINGLE CHIP LOW POWER 10/100 ETHERNET PHYSICAL LAYER TRANSCEIVER
中文描述: DATACOM, ETHERNET TRANSCEIVER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, TQFP-64
文件頁數(shù): 42/61頁
文件大小: 459K
代理商: LAN83C185-JT
High Performance Single Chip Low Power 10/100 Ethernet Physical Layer Transceiver (PHY)
Datasheet
Rev. 0.8 (11-16-04)
42
SMSC LAN83C185
DATASHEET
29.6
INT6
1 = Auto-Negotiation complete
0 = not source of interrupt
RO/
LH
0
29.5
INT5
1 = Remote Fault Detected
0 = not source of interrupt
RO/
LH
0
29.4
INT4
1 = Link Down (link status negated)
0 = not source of interrupt
RO/
LH
0
29.3
INT3
1 = Auto-Negotiation LP Acknowledge
0 = not source of interrupt
RO/
LH
0
29.2
INT2
1 = Parallel Detection Fault
0 = not source of interrupt
RO/
LH
0
29.1
INT1
1 = Auto-Negotiation Page Received
0 = not source of interrupt
RO/
LH
0
29.0
Reserved
RO/
LH
0
Table 5.51 Register 30 - Interrupt Mask
ADDRESS
NAME
DESCRIPTION
MODE
DEFAULT
30.15:8
Reserved
Write as 0; ignore on read.
RO
0
30.7:0
Mask Bits
1 = interrupt source is enabled
0 = interrupt source is masked
RW
0
Table 5.52 Register 31 - PHY Special Control/Status
ADDRESS
NAME
DESCRIPTION
MODE
DEFAULT
31.15
Reserved
Do not write to this register. Ignore on read.
RW
0
31.14
Reserved
31.13
Special
Must be set to 0
RW
0
31.12
Autodone
Auto-negotiation done indication:
0 = Auto-negotiation is not done or disabled (or not
active)
1 = Auto-negotiation is done
RO
0
31.11:10
Reserved
RW
0
31.9:7
GPO[2:0]
General Purpose Output connected to signals
GPO[2:0]
RW
0
31.6
Enable 4B5B
0 = Bypass encoder/decoder.
1 = enable 4B5B encoding/decoding.
MAC Interface must be configured in MII mode.
RW
1
31.5
Reserved
Write as 0, ignore on Read.
RW
0
Table 5.50 Register 29 - Interrupt Source Flags (continued)
ADDRESS
NAME
DESCRIPTION
MODE
DEFAULT
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