參數(shù)資料
型號(hào)： LAN83C185-JT
廠商： STANDARD MICROSYSTEMS CORP
元件分類： 網(wǎng)絡(luò)接口
英文描述： HIGH PERFORMANCE SINGLE CHIP LOW POWER 10/100 ETHERNET PHYSICAL LAYER TRANSCEIVER
中文描述： DATACOM, ETHERNET TRANSCEIVER, PQFP64
封裝： 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, TQFP-64
文件頁(yè)數(shù)： 58/61頁(yè)
文件大?。?/td> 459K
代理商： LAN83C185-JT
High Performance Single Chip Low Power 10/100 Ethernet Physical Layer Transceiver (PHY)
Datasheet
Rev. 0.8 (11-16-04)
58
SMSC LAN83C185
DATASHEET
Table 6.4 LAN Interface Signals
PIN NO.
NAME
V
IH
V
IL
I
OH
I
OL
V
OL
V
OH
51
TXP
See
Table 6.10, “100Base-TX Transceiver Characteristics,” on page 60
and
Table 6.11, “10BASE-T Transceiver Characteristics,” on page 60
.
50
TXN
55
RXP
54
RXN
Table 6.5 LED Signals
PIN NO.
NAME
V
IH
V
IL
I
OH
I
OL
V
OL
V
OH
16
SPEED100
+2.0 V
+0.8 V
-12 mA
+24 mA
+0.4 V
VDD –
+0.4 V
17
LINKON
+2.0 V
+0.8 V
-12 mA
+24 mA
+0.4 V
VDD –
+0.4 V
19
ACTIVITY
+2.0 V
+0.8 V
-12 mA
+24 mA
+0.4 V
VDD –
+0.4 V
20
FDUPLEX
+2.0 V
+0.8 V
-12 mA
+24 mA
+0.4 V
VDD –
+0.4 V
Table 6.6 Configuration Inputs
PIN NO.
NAME
V
IH
V
IL
I
OH
I
OL
V
OL
V
OH
16
PHYAD0
+2.0 V
+0.8 V
-12 mA
+24 mA
+0.4 V
VDD –
+0.4 V
17
PHYAD1
+2.0 V
+0.8 V
-12 mA
+24 mA
+0.4 V
VDD –
+0.4 V
19
PHYAD2
+2.0 V
+0.8 V
-12 mA
+24 mA
+0.4 V
VDD –
+0.4 V
20
PHYAD3
+2.0 V
+0.8 V
-12 mA
+24 mA
+0.4 V
VDD –
+0.4 V
2
PHYAD4
-4 mA
+8 mA
+0.4 V
VDD –
+0.4 V
4
MODE0
+2.0 V
+0.8 V
5
MODE1
+2.0 V
+0.8 V
6
MODE2
+2.0 V
+0.8 V
9
TEST0
+2.0 V
+0.8 V
10
TEST1
+2.0 V
+0.8 V
11
CLK_FREQ
+2.0 V
+0.8 V
12
REG_EN
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