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參數(shù)資料
| 型號(hào)： | LC5256MC-5F256C |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類(lèi)： | PLD |
| 英文描述： | 3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
| 中文描述： | EE PLD, 6 ns, PBGA256 |
| 封裝： | FPBGA-256 |
| 文件頁(yè)數(shù)： | 29/92頁(yè) |
| 文件大?。?/td> | 378K |
| 代理商： | LC5256MC-5F256C |
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Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
29
ispXPLD 5000MX Family External Switching Characteristics
1, 2, 3
Over Recommended Operating Conditions
Parameter
Description
-4
-45
-5
-52
-75
Units
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
t
PD
Data Propagation Delay,
5-PT Bypass
Data propagation delay
MFB Register Setup Time
Before Clock, 5-PT Bypass
MFB Register Setup Time
Before Clock
MFB Register Setup Time
Before Clock, Input Register
Path
MFB Register Hold Time
Before Clock, 5-PT Bypass
MFB Register Hold Time
Before Clock
MFB Register Hold Time
Before Clock, Input Register
Path
MFB Register Clock-to-Out-
put Delay
External Reset Pin to Output
Delay
Reset Pulse Duration
Input to Output Local Product
Term Output Enable/Disable
Input to Output Shared
Product Term Output Enable/
Disable
Global OE Input to Output
Enable/Disable
Clock Width, High or Low
Gate Width Low (for Low
Transparent) or High (for
High Transparent)
Input Register Clock Width,
High or Low
Clock-to-Out Skew, Block
Level
Clock Frequency with
Internal Feedback
Clock Frequency with
External Feedback,
1/ (t
S
+ t
CO
)
Clock Frequency Max.
Toggle
Clock Frequency to CAM
(Con
fi
gure Mode)
Clock Frequency to CAM
(Compare Mode)
—
4.0
—
4.5
—
5.0
—
5.2
—
7.5
ns
t
PD_PTSA
—
4.8
—
5.7
—
6.0
—
6.5
—
9.5
ns
t
S
2.2
—
2.8
—
2.8
—
3.0
—
4.5
—
ns
t
S_PTSA
2.5
—
3.1
—
3.1
—
3.6
—
5.5
—
ns
t
SIR
1.0
—
1.0
—
1.0
—
0.5
—
1.7
—
ns
t
H
0.0
—
0.0
—
0.0
—
0.0
—
0.0
—
ns
t
H_PTSA
0.0
—
0.0
—
0.0
—
0.0
—
0.0
—
ns
t
HIR
0.5
—
0.5
—
0.5
—
1.0
—
1.3
—
ns
t
CO
—
2.8
—
3.0
—
3.2
—
3.7
—
5.0
ns
t
R
—
4.0
—
4.5
—
5.0
—
5.0
—
7.5
ns
t
RW
1.8
—
1.8
—
1.8
—
2.0
—
3.0
—
ns
t
LPTOE/DIS
—
6.0
—
7.0
—
7.5
—
8.5
—
10.5
ns
t
SPTOE/DIS
—
6.0
—
7.0
—
7.5
—
8.5
—
10.5
ns
t
GOE/DIS
—
4.5
—
5.5
—
5.5
—
6.5
—
7.5
ns
t
CW
1.5
—
1.5
—
1.5
—
1.8
—
2.5
—
ns
t
GW
1.5
—
1.5
—
1.5
—
1.8
—
2.5
—
ns
t
WIR
1.5
—
1.5
—
1.5
—
1.8
—
2.5
—
ns
t
SKEW
—
0.6
—
0.6
—
0.6
—
0.6
—
1.0
ns
f
MAX
4
—
300
—
275
—
250
—
250
—
150
MHz
f
MAX
(Ext.)
—
200
—
171
—
166
—
149
—
105
MHz
f
MAX
(Tog.)
—
333
—
333
—
333
—
277
—
200
MHz
f
MAX
(CAMC)
5
—
280
—
280
—
230
—
230
—
168
MHz
f
MAX
(CAM)
5
—
150
—
150
—
150
—
135
—
90
MHz
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| LC5256MC-75F256C | 3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
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| LC5512MC-75F256C | 3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC5256MC-5F256I | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 PROGRAM EXPANDED LOG RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類(lèi)型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| LC5256MC-5F484C | 制造商:LATTICE 制造商全稱(chēng):Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
| LC5256MC-5F484I | 制造商:LATTICE 制造商全稱(chēng):Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
| LC5256MC-5F672C | 制造商:LATTICE 制造商全稱(chēng):Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
| LC5256MC-5F672I | 制造商:LATTICE 制造商全稱(chēng):Lattice Semiconductor 功能描述:3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD⑩ Family |
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