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參數(shù)資料
| 型號(hào)： | LCK4950 |
| 英文描述： | Low-Voltage PLL Clock Driver |
| 中文描述： | 低電壓PLL時(shí)鐘驅(qū)動(dòng)器 |
| 文件頁(yè)數(shù)： | 12/16頁(yè) |
| 文件大?。?/td> | 215K |
| 代理商： | LCK4950 |
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12
Agere Systems Inc.
Data Sheet
November 2001
Low-Voltage PLL Clock Driver
LCK4950
Electrical Characteristics
(continued)
Using the On-Chip Crystal Oscillator
The LCK4950 features an on-chip crystal oscillator buffer to allow for seed clock generation as well as final
distribution. The only external component required is the crystal since the on-chip oscillator buffer is completely
self-contained. The user is advised to mount the crystal as close to the LCK4950 as possible to avoid board-level
parasitics since the oscillator is, to a degree, sensitive to loading at the inputs. To facilitate collocation, surface-
mount crystals are recommended, but not required.
The oscillator circuit is a parallel resonant circuit with on-chip shunt capacitors. A parallel resonant crystal is simply
a crystal that has been characterized in its parallel resonant mode. Therefore, in the majority of cases, a parallel
specified crystal or a series resonant crystal can be used with the LCK4950 with just a minor frequency error.
Typically, a series crystal used in a parallel resonant mode will exhibit an oscillatory frequency a few hundred ppm
different than the specified value. For most processor implementations, a few hundred ppm translates into kHz
inaccuracies, a small enough level not to represent a major issue.
The LCK4950 is a clock driver that was designed to generate outputs with programmable frequency relationships.
As a result, the crystal input frequency is a function of the desired output frequency. To determine the crystal
required to produce the desired output frequency for an application that utilizes internal feedback, the PLL block
diagram (Figure 9) should be used. The P and the M values for the LCK4950 are also included in Figure 9. The M
values can be found in Table 1 on page 3.
Table 9. Crystal Specifications
Parameter
Value
Crystal Cut
Resonance
Frequency Tolerance
Frequency/Temperature Stability
Operating Range
Shunt Capacitors
Equivalent Series Resistance (ESR)
Correction Drive Level
Aging
Fundamental AT Cut
Parallel Resonance
±75 ppm at 25
°
C
±150 ppm at 0
°
C
to 70
°
C
0
°
C
to 70
°
C
10 pF
—
40 pF
50
to 80
Max
100 μW
5 ppm/yr (first three years)
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