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參數(shù)資料
| 型號： | LH28F160BHE-TTL90 |
| 廠商： | Sharp Corporation |
| 英文描述： | 16M (x8/x16) Flash Memory |
| 中文描述： | 1,600（x8/x16）閃存 |
| 文件頁數(shù)： | 14/46頁 |
| 文件大?。?/td> | 679K |
| 代理商： | LH28F160BHE-TTL90 |
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LHF16J04
12
Rev. 1.26
4.1 Read Array Command
Upon initial device power-up and after exit from reset
mode, the device defaults to read array mode. This
operation is also initiated by writing the Read Array
command. The device remains enabled for reads until
another command is written. Once the internal WSM has
started a block erase, full chip erase, word/byte write or
lock-bit configuration the device will not recognize the
Read Array command until the WSM completes its
operation unless the WSM is suspended via an Erase
Suspend or Word/Byte Write Suspend command. The
Read Array command functions independently of the
V
CCW
voltage and RP# can be V
IH
.
4.2 Read Identifier Codes Command
The identifier code operation is initiated by writing the
Read Identifier Codes command. Following the command
write, read cycles from addresses shown in Figure 4
retrieve the manufacturer, device, block lock configuration
and permanent lock configuration codes (see Table 4 for
identifier code values). To terminate the operation, write
another valid command. Like the Read Array command,
the
Read
Identifier
Codes
independently of the V
CCW
voltage and RP# can be V
IH
.
Following the Read Identifier Codes command, the
following information can be read:
command
functions
Table 4. Identifier Codes
Code
Address
(2)
[A
19
-A
0
]
00000H
00001H
BA
(1)
+2
Data
(3)
[DQ
7
-DQ
0
]
B0H
E8H
Manufacture Code
Device Code
Block Lock Configuration
Block is Unlocked
Block is Locked
Reserved for Future Use
Permanent Lock Configuration
Device is Unlocked
Device is Locked
Reserved for Future Use
NOTE:
1. BA selects the specific block lock configuration code
to be read. See Figure 4 for the device identifier code
memory map.
2. A
-1
don’t care in byte mode.
3. DQ
15
-DQ
8
outputs 00H in word mode.
DQ
0
=0
DQ
0
=1
DQ
1-7
00003H
DQ
0
=0
DQ
0
=1
DQ
1-7
4.3 Read Status Register Command
The status register may be read to determine when a block
erase, full chip erase, word/byte write or lock-bit
configuration is complete and whether the operation
completed successfully. It may be read at any time by
writing the Read Status Register command. After writing
this command, all subsequent read operations output data
from the status register until another valid command is
written. The status register contents are latched on the
falling edge of OE# or CE#, whichever occurs. OE# or
CE# must toggle to V
IH
before further reads to update the
status register latch. The Read Status Register command
functions independently of the V
CCW
voltage. RP# can be
V
IH
.
4.4 Clear Status Register Command
Status register bits SR.5, SR.4, SR.3 or SR.1 are set to
"1"s by the WSM and can only be reset by the Clear Status
Register command. These bits indicate various failure
conditions (see Table 6). By allowing system software to
reset these bits, several operations (such as cumulatively
erasing multiple blocks or writing several words/bytes in
sequence) may be performed. The status register may be
polled to determine if an error occurred during the
sequence.
To clear the status register, the Clear Status Register
command (50H) is written. It functions independently of
the applied V
CCW
Voltage. RP# can be V
IH
. This
command is not functional during block erase or
word/byte write suspend modes.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LH28F160BJB-BTL90 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Flash ROM |
| LH28F160BJB-TTL90 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Flash ROM |
| LH28F160BJB-TTLZS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Flash ROM |
| LH28F160BJE-BTL90 | 功能描述:IC FLASH 16MBIT 90NS 48TSOP RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:96 系列:- 格式 - 存儲器:閃存 存儲器類型:FLASH 存儲容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并聯(lián) 電源電壓:2.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP 包裝:托盤 |
| LH28F160BJE-TTL90 | 制造商:Sharp Microelectronics Corporation 功能描述:NOR Flash Parallel 3.3V 16Mbit 2M/1M x 8bit/16bit 90ns 48-Pin TSOP |
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