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參數(shù)資料
| 型號： | LH7A405 |
| 英文描述： | Microcontroller |
| 中文描述： | 微控制器 |
| 文件頁數(shù)： | 22/53頁 |
| 文件大?。?/td> | 396K |
| 代理商： | LH7A405 |
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LH7A405
32-Bit System-on-Chip
22
Advance Data Sheet
Data Paths
The data paths in the LH7A405 are:
The AMBA AHB bus
The AMBA APB bus
The External Bus Interface
The LCD AHB bus
The DMA busses.
AMBA AHB BUS
The Advanced Microprocessor Bus Architecture
AHB (AMBA AHB) is a high speed 32-bit-wide data bus.
The AMBA AHB is for high-performance, high-clock-fre-
quency system modules.
Peripherals with high bandwidth requirements are
connected to the LH7A405 core processor using the
AHB bus, Boot ROM, BlueStreak Accelerator, Vectored
Interrupt Controllers, and USB Device. These include
the external and internal memory interfaces, the LCD
registers, palette RAM and the bridge to the Advanced
Peripheral Bus (APB) interface. The APB Bridge trans-
parently converts the AHB access into the slower
speed APB accesses. All control registers for the APB
peripherals are programmed using the AHB-to-APB
bridge interface. The main AHB data and address lines
are configured using a multiplexed bus. This removes
the need for tri-state buffers and bus holders and sim-
plifies bus arbitration.
Figure 3. Clock and State Controller Block Diagram
14.7456 MHz
MAIN OSC.
HCLK
32.768 kHz
RTC OSC.
/2, /4, /8
PCLKs
FCLK
HCLK
(TO PROCESSOR CORE)
LH7A405-6
STATE CONTROLLER
DIVIDE REGISTER
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相關(guān)代理商/技術(shù)參數(shù) |
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| LH8000A-C | 制造商:Black Box Corporation 功能描述:DUAL SPEED 10/100 STACKABLE HUB CLIENT |
| LH8000A-C-W1 | 制造商:Black Box Corporation 功能描述:1 YEAR WARRANTY FOR LH8000A-C |
| LH8000A-C-W3 | 制造商:Black Box Corporation 功能描述:3 YEAR WARRANTY FOR LH8000A-C |
| LH8000A-M | 制造商:Black Box Corporation 功能描述:DUAL SPEED 10/100 STACKABLE HUB MASTER |
| LH8000A-M-SOL-W1 | 制造商:Black Box Corporation 功能描述:1 YEAR WARRANTY FOR LH8000A-M-SOL |
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