LH7A405
32-Bit System-on-Chip
36
Advance Data Sheet
NOTES:
1. TBD = To Be Determined, awaiting characterization.
2. For Output Drive strength specifications, refer to ‘DC Specifications’.
SYNCHRONOUS MEMORY INTERFACE SIGNALS
50 pF
8 mA
tOVA
50 pF
8 mA
tOVB
50 pF
8 mA
tOVD
tISD
tIHD
tOVCA
tOHCA
tOVRA
tOHRA
tOVSDW
tOHSDW
30 pF
8 mA
tOVC0
30 pF
8 mA
tOVDQ
tOVSC
tOVHSC
PC CARD (PCMCIA) INTERFACE SIGNALS
50 pF
8 mA
tOVA
tOVDREG
tOHDREG
tISD
tIHD
tOVCE1
tOHCE1
tOVCE2
tOHCE2
tOVOE
tOHOE
tOVWE
tOHWE
MMC INTERFACE SIGNALS
tOVCMD
tOHCMD
tOVDAT
tOHDAT
tISDAT
tIHDAT
tOVCMD
tIHCMD
AC97 INTERFACE SIGNALS
tOVAC97
tOHAC97
tISAC97
tIHAC97
SYNCHRONOUS SERIAL PORT (SSP)
tISSSPFRM
50 pF
2 mA
tOVSSPOUT
tISSSPIN
A[15:2]/SA[13:0]
A[17:16]/SBANK[1:0]
Output
Output
Output
8 ns
8 ns
6 ns
Address Valid
Address Valid/Bank Select Valid
Data Valid
Data Setup
Data Hold
CAS Valid
CAS Hold
RAS Valid
RAS Hold
Write Enable Valid
Write Enable Hold
Clock Enable Valid
Data Mask Valid
Synchronous Chip Select Valid
Synchronous Chip Select Hold
D[31:0]
2 ns
4 ns
0 ns
2 ns
0 ns
2 ns
0 ns
2 ns
0 ns
2 ns
2 ns
2 ns
0 ns
Input
nCAS
Output
30 pF
8 mA
6 ns
nRAS
Output
30 pF
8 mA
6 ns
nSWE
Output
30 pF
8 mA
6 ns
SCKE[1:0]
DQM[3:0]
Output
Output
6 ns
6 ns
6 ns
nSCS[3:0]
Output
30 pF
8 mA
A[25:0]
Output
8 ns
8 ns
Address Valid
nREG Valid
nREG Hold
Data Setup Time
Data Hold Time
Chip Enable 1 Valid
Chip Enable 1 Hold
Chip Enable 2 Valid
Chip Enable 2 Hold
Output Enable Valid
Output Enable Hold
Write Enable Valid
Write Enable Hold
nCFREG
Output
30 pF
8 mA
2 ns
0 ns
4 ns
0 ns
0 ns
0 ns
0 ns
0 ns
0 ns
0 ns
0 ns
0 ns
D[31:0]
Input
nCFCE1
Output
30 pF
8 mA
8 ns
nCFCE2
Output
30 pF
8 mA
8 ns
nCFOE
Output
30 pF
8 mA
8 ns
nCFWE
Output
30 pF
8 mA
8 ns
MMCCMD
Output
100 pF
8 mA
TBD
MMC Command Valid
MMC Command Hold
MMC Data Valid
MMC Data Hold
MMC Data Setup
MMC Data Hold
MMC Command Setup
MMC Command Hold
TBD
MMCDATA
Output
100 pF
8 mA
TBD
TBD
TBD
TBD
TBD
TBD
MMCDATA
Input
MMCCMD
Input
AC97OUT
Output
30 pF
8 mA
TBD
AC97 Output Valid
AC97 Output Hold
AC97 Input Setup
AC97 Input Hold
TBD
TBD
TBD
AC97IN
Input
SSPFRM
SSPTX
SSPRX
Input
Output
Input
14 ns
TBD
14 ns
SSPFRM Input Valid
SSP Transmit Valid
SSP Receive Setup
Table 5. AC Signal Characteristics (Cont’d)
SIGNAL
TYPE
LOAD
DRIVE
SYMBOL
MIN.
MAX.
DESCRIPTION