Interrupts
81
Mitsubishi microcomputers
M16C / 62P Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
development
Preliminary Specifications Rev.1.0
Specifications in this manual are tentative and subject to change.
Figure 1.11.3. Interrupt Control Registers
Symbol
INT3IC (Note 4)
S4IC/INT5IC
S3IC/INT4IC
INT0IC to INT2IC
Address
0044
16
0048
16
0049
16
005D
16
to 005F
16
After reset
XX00X000
2
XX00X000
2
XX00X000
2
XX00X000
2
Bit name
Function
Bit symbol
ILVL0
b7
b6
b5
0
b4
b3
b2
b1
b0
AA
IR
POL
No functions are assigned.
When writing to these bits, write “0”. The values in these bits
when read are indeterminate.
Interrupt priority level
select bit
Interrupt request bit
Polarity select bit
Reserved bit
0: Interrupt not requested
1: Interrupt requested
0 : Selects falling edge (Notes 3, 5)
1 : Selects rising edge
Must always be set to “0”
ILVL1
ILVL2
Note 1: This bit can only be reset by writing "0" (Do not write "1").
Note 2: To rewrite the interrupt control register, do so at a point that does not generate the interrupt request for that
register. For details, see the precautions for interrupts.
Note 3: If the IFSR register’s IFSRi bit (i = 0 to 5) is "1" (both edges), set the INTiIC register’s POL bit to "0 "(falling
edge).
Note 4: During memory expansion and microprocessor modes, set the INT3IC register’s ILVL2 to ILVL0 bits to ‘000
2
’
(interrupt disabled).
Note 5: Set the S3IC or S4IC register’s POL bit to "0" (falling edge) when the IFSR register’s IFSR6 bit = 0 (SI/O3
selected) or IFSR7 bit = 0 (SI/O4 selected), respectively.
(Note 1)
Interrupt control register (Note 2)
b7
b6
b5
b4
b3
b2
b1
b0
AAA
AAA
Bit name
Function
Bit symbol
RW
Symbol
Address
After reset
XXXXX000
2
XXXXX000
2
XXXXX000
2
XXXXX000
2
XXXXX000
2
XXXXX000
2
XXXXX000
2
XXXXX000
2
XXXXX000
2
XXXXX000
2
XXXXX000
2
TB5IC
TB4IC/U1BCNIC (Note 3)
TB3IC/U0BCNIC (Note 3)
BCNIC
DM0IC, DM1IC
KUPIC
ADIC
S0TIC to S2TIC
S0RIC to S2RIC
TA0IC to TA4IC
TB0IC to TB2IC
0045
16
0046
16
0047
16
004A
16
004B
16
, 004C
16
004D
16
004E
16
0051
16
, 0053
16
, 004F
16
0052
16
, 0054
16
, 0050
16
0055
16
to 0059
16
005A
16
to 005C
16
ILVL0
IR
Interrupt priority level
select bit
Interrupt request bit
0 : Interrupt not requested
1 : Interrupt requested
ILVL1
ILVL2
No functions are assigned.
When writing to these bits, write “0”. The values in these bits
when read are indeterminate.
(Note 1)
Note 1: This bit can only be reset by writing "0" (Do not write "1").
Note 2: To rewrite the interrupt control registers, do so at a point that does not generate the interrupt request for that
register. For details, see the precautions for interrupts.
Note 3: Use the IFSR2A register to select.
0 0 0 : Level 0 (interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
b2 b1 b0
0 0 0 : Level 0 (interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
b2 b1 b0
RW
RW
RW
RW
(b7-b4)
RW
RW
RW
RW
RW
RW
RW
RW
(b7-b6)