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Operation of Functional Blocks
The M30218 group accommodates certain units in a single chip. These units include ROM and RAM to
store instructions and data and the central processing unit (CPU) to execute arithmetic/logic operations.
Also included are peripheral units such as timers, FLD controller, serial I/O, D-A converter, DMAC, CRC
calculation circuit, A-D converter, and I/O ports.
The following explains each unit.
Memory
Figure 5 is a memory map of the M30218 group. The address space extends the 1M bytes from address
00000
16
to FFFFF
16
. From FFFFF
16
down is ROM. For example, in the M30218MC-XXXFP, there is 128K
bytes of internal ROM from E0000
16
to FFFFF
16
. The vector table for fixed interrupts such as the reset are
mapped to FFFDC
16
to FFFFF
16
. The starting address of the interrupt routine is stored here. The address
of the vector table for timer interrupts, etc., can be set as desired using the internal register (INTB). See the
section on interrupts for details.
From 00400
16
up is RAM. For example, in the M30218MC-XXXFP, there is 12K bytes of internal RAM from
00400
16
to 033FF
16
. In addition to storing data, the RAM also stores the stack used when calling subrou-
tines and when interrupts are generated. (From 00400
16
to 004FF
16
is RAM for SIO2. From 00500
16
to
005DF
16
is RAM for FLD.)
The SFR area is mapped to 00000
16
to 003FF
16
. This area accommodates the control registers for periph-
eral devices such as I/O ports, A-D converter, serial I/O, and timers, etc. Any part of the SFR area that is not
occupied is reserved and cannot be used for other purposes.
The special page vector table is mapped to FFE00
16
to FFFDB
16
. If the starting addresses of subroutines
or the destination addresses of jumps are stored here, subroutine call instructions and jump instructions
can be used as 2-byte instructions, reducing the number of program steps.
Figure 5. Memory map
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