參數(shù)資料
型號(hào)： M34W02
廠商： 意法半導(dǎo)體
元件分類： DRAM
英文描述： 2Kbit Serial EEPROM with Software Data Protection(2Mb串行EEPROM)
中文描述： 2Kbit串行EEPROM與軟件數(shù)據(jù)保護(hù)（處理器串行EEPROM中）
文件頁數(shù)： 12/17頁
文件大小： 152K
代理商： M34W02
S
DEV SEL *
BYTE ADDR
S
DEV SEL
DATA OUT 1
AI01942
DATA OUT N
S
S
CURRENT
ADDRESS
READ
DEV SEL
DATA OUT
RANDOM
ADDRESS
READ
S
S
DEV SEL *
DATA OUT
SEQUENTIAL
CURRENT
READ
S
DATA OUT N
S
DEV SEL *
BYTE ADDR
SEQUENTIAL
RANDOM
READ
S
DEV SEL *
DATA OUT 1
S
ACK
R/W
NO ACK
ACK
R/W
ACK
ACK
R/W
ACK
ACK
ACK
NO ACK
R/W
NO ACK
ACK
ACK
R/W
ACK
ACK
R/W
ACK
NO ACK
Figure 11. Read Modes Sequence
Note:
* The 7 Most Significant bits of DEV SEL bytes of a Random Read (1st byte and 3rd byte) must be identical.
Sequential Read.
This mode can be initiated with
either a Current Address Read or a Random Ad-
dress Read. However, in this case the master
DOES acknowledge the data byte output and the
memory continues to output the next byte in se-
quence. To terminate the stream of bytes, the
master must NOT acknowledge the last byte output
and MUST generate a STOP condition. The output
data is from consecutive byte addresses, with the
internal byte address counter automatically incre-
mented after each byte output. After a count giving
the last memory address, the address counter will
’roll- over’ and the memory will continue to output
data.
Acknowledge in Read Mode.
In all read modes
the M34W02 waits for an acknowledge during the
9th bit time. If the master does not pull the SDA line
low during this time, the M34W02 terminates the
data transfer and switches to a standby state.
12/17
M34W02
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