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參數(shù)資料
| 型號： | M38C59GFHP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 6.25 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80 |
| 文件頁數(shù)： | 51/71頁 |
| 文件大?。?/td> | 939K |
| 代理商： | M38C59GFHP |
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Rev.2.00
Nov 23, 2005
page 55 of 75
REJ03B0098-0200
38C5 Group (One Time PROM version)
Fig. 54 Ceramic resonator circuit example
Fig. 55 External clock input circuit
Oscillation Control
(1) Stop Mode
If the STP instruction is executed, the system clock
φ stops at an “H”
level, and main clock and sub-clock oscillators stop.
In this time, values set previously to timer 1 latch and timer 2 latch
are loaded automatically to timer 1 and timer 2. Set the values to
generate the wait time required for oscillation stabilization to timer 1
latch and timer 2 latch (low-order 8 bits of timer 1 and high-order 8
bits of timer 2) before the STP instruction.
The frequency divider for timer 1 is used for the timer 1 count source,
and the output of timer 1 is forcibly connected to timer 2. In this time,
bits 0 to 5 of the timer 12 mode register are cleared to “0”.
The values of the timer 12 frequency divider selection register are
not changed.
Set the interrupt enable bits of the timer 1 and timer 2 to be disabled
(“0”) before executing the STP instruction.
When an external interrupt is received, the clock oscillated before
stop mode and the on-chip oscillator start oscillating.
However, bit 3 of CPUM is set to “1” forcibly and system returns to
the on-chip oscillator mode.
Oscillator restarts when reset occurs or an interrupt request is re-
ceived, but the system clock
φ is not supplied to the CPU until timer 2
underflows. This allows time for the clock circuit oscillation to stabilize.
(2) Wait Mode
If the WIT instruction is executed, only the system clock
φ stops at an
“H” state. The states of main clock, on-chip oscillator and sub clock
are the same as the state before executing the WIT instruction, and
oscillation does not stop. Since supply of system clock
φ is started
immediately after the interrupt is received, the instruction can be ex-
ecuted immediately.
XCIN
XCOUT
XIN
XOUT
CIN
COUT
CCIN
CCOUT
Rf
Rd
Rd (Note)
Notes : Insert a damping resistor if required.
The resistance will vary depending on the oscillator and the
oscillation drive capacity setting.
Use the value recommended by the maker of the oscillator.
Also, if the oscillator manufacturer's data sheet specifies
that a feedback resistor be added external to the chip
though a feedback resistor exists on-chip, insert a feedback
resistor between XIN and XOUT following the instruction.
XCIN
XCOUT
XIN
XOUT
External oscillation circuit
Open
VCC
VSS
CCIN
Rf
Rd
CCOUT
CLOCK GENERATING CIRCUIT
The oscillation circuit of 38C5 group can be formed by connecting an
oscillator, capacitor and resistor between XIN and XOUT (XCIN and
XCOUT). To supply a clock signal externally, input it to the XIN pin and
make the XOUT pin open. The clocks that are externally generated
cannot be directly input to XCIN. Use the circuit constants in accor-
dance with the oscillator manufacturer's recommended values. No
external resistor is needed between XIN and XOUT since a feed-back
resistor exists on-chip. (An external feed-back resistor may be needed
depending on conditions.) However, an about 10 M
external feed-
back resistor is needed between XCIN and XCOUT.
Immediately after reset is released, only the on-chip oscillator starts
oscillating, XIN -XOUT oscillation stops oscillating, and XCIN and XCOUT
pins function as I/O ports.
Frequency Control
(1) On-chip oscillation Mode
The system clock
φ is the on-chip oscillator oscillation divided by 32.
(2) Middle-speed Mode
The system clock
φ is the frequency of XIN divided by 8.
(3)High-speed Mode
The system clock
φ is half the frequency of XIN.
(4) Low-speed Mode
The system clock
φ is half the frequency of sub clock.
After reset release and when system returns from the stop mode, the
on-chip oscillator mode is selected.
Refer to the clock state transition diagram for the setting of transition
to each mode.
The XIN–XOUT oscillation is controlled by the bit 5 of CPUM, and the
sub-clock oscillation is controlled by the bit 4 of CPUM. When the
mode is switched to the on-chip oscillator mode, set the bit 3 of CPUM
to “1”.
In the on-chip oscillator mode, the oscillation by the oscillator can be
stopped. In the low-speed mode, the power consumption can be re-
duced by stopping the XIN–XOUT oscillation.
When the mode is switched from the on-chip oscillator mode to the
low-speed mode, the on-chip oscillator is stopped.
Set enough time for oscillation to stabilize by programming to re-start
the stopped oscillation and switch the operation mode. Also, set
enough time for oscillation to stabilize by programming to switch the
timer count source .
s Notes on Clock Generating Circuit
If you switch the mode between on-chip oscillator mode, middle/high-
speed mode and low-speed mode, stabilize both XIN and XCIN oscil-
lations. Especially be careful immediately after power-on and at re-
turning from stop mode. Refer to the clock state transition diagram
for the setting of transition to each mode. Set the frequency in the
condition that f(XIN) > 3f(XCIN).
When the middle- and high-speed mode are not used (XIN-XOUT os-
cillation and external clock input are not performed), connect XIN to
VCC through a resistor.
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