參數(shù)資料
型號: M52S128168A-7.5BG
廠商: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC
元件分類: DRAM
英文描述: 1M x 16 Bit x 4 Banks Synchronous DRAM
中文描述: 8M X 16 SYNCHRONOUS DRAM, 6 ns, PBGA54
封裝: 8 X 8 MM, LEAD FREE, FBGA-54
文件頁數(shù): 22/47頁
文件大小: 1213K
代理商: M52S128168A-7.5BG
ES MT
Preliminary
M52S128168A
Elite Semiconductor Memory Technology Inc.
Revision
:
1.0
Publication Date
:
May. 2007
22/47
*Note : 1. To prevent bus contention, there should be at least one gap between data in and data out.
5. Write Interrupted by Precharge & DQM
*Note : 1. To prevent bus contention, DQM should be issued which makes at least one gap between data in and data out.
2. To inhibit invalid write, DQM should be issued.
3. This precharge command and burst write command should be of the same bank, otherwise it is not precharge interrupt
but only another bank precharge of four banks operation.
CLK
C M D
DQ M
DQ
D0
D1
D2
W R
* No t e 3
*N ot e 2
Ma s k e d b y D Q M
D3
CLK
i ) C M D
i i ) C M D
i i i ) C M D
i v) C M D
DQ M
DQ M
DQ M
DQ M
DQ
DQ
DQ
DQ
D1
D3
D1
D0
D2
D3
D0
D2
W R
(b) CL=3,BL= 4
R D
W R
R D
W R
D1
D3
D0
D2
D1
D3
D0
D2
R D
W R
H i - Z
D1
D3
D0
D2
Q0
*Not e 1
v) C M D
DQ M
DQ
R D
W R
H i - Z
R D
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相關代理商/技術參數(shù)
參數(shù)描述
M52S128168A-7BG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM
M52S128168A-7TG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM
M52S128324A 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Synchronous DRAM
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M52S128324A-10TG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Synchronous DRAM