參數(shù)資料
型號: M66271FP
廠商: Mitsubishi Electric Corporation
英文描述: OPERATION PANEL CONTROLLER
中文描述: 操作面板控制器
文件頁數(shù): 3/21頁
文件大?。?/td> 289K
代理商: M66271FP
OPERATION PANEL CONTROLLER
M66271FP
MITSUBISHI <DIGITAL ASSP>
PIN DESCRIPTIONS
Generate an internal clock.
For crystal oscillator or external clock signal.
No connection
N.C
10
Ground
12
V
SS
Power supply.(source +5V )
7
V
DD
MPU data bus
Connect to MPU data bus.
Selecting 8bit MPU by MPUSEL input, D<15:8> connect to V
DD
or V
SS
.
Input/
Output
D<15:0>
16
Input
High-Write strobe input
When this pin is "L", data write to the internal VRAM. HWR is valid only in using 16-bit MPU
controlled byte access by LWR and HWR. (Refer to Figure-1)
1
HWR
Input
MPU address bus
Connect to MPU address bus.
16-bit MPU, use A<13:1> for the address bus with combining A<0> and BHE by the method
of access to internal VRAM (Refer to Figure-1). Use A<4:0> for selecting address of control register.
When selecting 8
-
bit MPU, use A<13:0>. And selecting
A<13:0>
14
Input
Low-Write strobe input
When this pin is "L", data write to the internal control register or VRAM. (Refer to Figure-1)
1
LWR
Chip select input of control register
When this pin is "L", select the internal control register. Assign to I/O space of MPU.
Chip select input of VRAM
When this pin is "L", select the internal VRAM. Assign to memory space of MPU.
Input
1
IOCS
Input
1
MCS
Input
Read strobe input
When this pin is "L", data read from the internal control register or VRAM.(Refer to Figure-1)
1
RD
Input
8/16-bit MPU select input
According to MPU, set "V
SS
" for 8bit MPU and set "V
DD
" for 16bit MPU.
MPUSEL
1
Input
Reset input
Use reset signal of MPU.When this pin is "L", initialize all internal control register and counter.
1
RESET
Input
MPU clock
Input of MPU clock.
Bus-High-Enable input
This pin is valid when using 16-bit MPU controlled byte access by A<0> and BHE (Refer to Figure-
1). Connect to "V
DD
" when using 8-bit MPU.
Set to "L" when using the additional function for the LCD Module built-in system.
WAIT output for MPU
This signal makes WAIT for MPU.
Change WAIT "L" at timing of falling edge of overlapping with MCS and (RD or LWR or HWR).
And return to "H" at synchronizing with the rising edge of MPUCLK after internal processing.
(Output WAIT only when requested access from MPU to VRAM during cycle steal access.)
MPUCLK
1
Input
BHE
1
Output
1
WAIT
4
Output
Display data bus for LCD
Transfer the LCD display data with 4-bit parallel signal.
Mutually output upper/lower data every CP output.
Display data transfer clock
Shift clock for the transfer of display data to LCD.
Take the display data of UD<3:0> to LCD at falling edge of CP.
Display data latch pulse
This clock use both as the latch pulse of display data for LCD and the transfer of scanning signal.
LP output when finish the transfer of display data of a line.
Latch of display data and the transfer of scanning signal at falling edge of LP.
First line marker signal
Output the start pulse of scanning line.
This signal is "H" active,the IC for driving scanning line catch FLM at falling edge of LP.
LCD alternating signal output
Signal for driving LCD by alternating current.
LCD(ON/OFF) control signal output
Output data which is set at bit"0 " of mode register(R1) in control register. This signal can use
for controlling the LCD power supply, because LCDENB set to "L" byRESET.
UD<3:0>
Output
1
CP
Output
1
LP
Output
1
FLM
Output
1
M
Output
1
LCDENB
Output
Output pin for oscillator
1
OSC2
Input
Input pin for oscillator
1
OSC1
MPU
interface
LCD
interface
Oscillator
Others
Pin
name
Input/
Output
Function
Number
of pins
Item
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