參數資料
型號: M69AW024B
廠商: 意法半導體
英文描述: 16 Mbit (1M x16) 3V Asynchronous PSRAM
中文描述: 16兆位(1米× 16)3V的異步移動存儲芯片
文件頁數: 6/29頁
文件大?。?/td> 429K
代理商: M69AW024B
M69AW024B
6/29
SIGNAL DESCRIPTIONS
See
Figure 2., Logic Diagram
, and
Table
1., Signal Names
, for a brief overview of the sig-
nals connected to this device.
Address Inputs (A0-A19).
The Address Inputs
select the cells in the memory array to access dur-
ing Read and Write operations.
Data Inputs/Outputs (DQ8-DQ15).
The
Byte Data Inputs/Outputs carry the data to or from
the upper part of the selected address during a
Write or Read operation, when Upper Byte Enable
(UB) is driven Low.
Data Inputs/Outputs (DQ0-DQ7).
The
Byte Data Inputs/Outputs carry the data to or from
the lower part of the selected address during a
Write or Read operation, when Lower Byte Enable
(LB) is driven Low.
Chip Enable (E1).
When asserted (Low), the
Chip Enable, E1, activates the memory state ma-
chine, address buffers and decoders, allowing
Read and Write operations to be performed. When
de-asserted (High), all other pins are ignored, and
the device is put, automatically, in low-power
Standby mode.
Upper
Lower
Chip Enable (E2).
The Chip Enable, E2, puts the
device in Deep Power-down mode when it
is driven Low. This is the lowest power mode.
Output Enable (G).
The Output Enable, G, pro-
vides a high speed tri-state control, allowing fast
read/write cycles to be achieved with the common
I/O data bus.
Write Enable (W).
The Write Enable, W, controls
the Bus Write operation of the memory.
Upper Byte Enable (UB).
The Upper Byte En-
able, UB, gates the data on the Upper Byte Data
Inputs/Outputs (DQ8-DQ15) to or from the upper
part of the selected address during a Write or
Read operation.
Lower Byte Enable (LB).
The Lower Byte En-
able, LB, gates the data on the Lower Byte Data
Inputs/Outputs (DQ0-DQ7) to or from the lower
part of the selected address during a Write or
Read operation.
V
CC
Supply Voltage.
The V
CC
Supply Voltage
supplies the power for all operations (Read or
Write) and for driving the refresh logic, even when
the device is not being accessed.
V
SS
Ground.
The V
SS
Ground is the reference for
all voltage measurements.
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