參數(shù)資料
型號： M7020R-066ZA1T
廠商： 意法半導體
英文描述： 32K x 68-bit Entry NETWORK SEARCH ENGINE
中文描述： 32K的× 68位進入網(wǎng)絡搜索引擎
文件頁數(shù)： 138/150頁
文件大?。?/td> 996K
代理商： M7020R-066ZA1T
M7020R
138/150
SRAM WRITE with a Table of Up to Eight Devices
The following explains the SRAM WRITE opera-
tion done through a table(s) of up to eight devices
with the following parameters (TLSZ = 01). The di-
agram of such a table is shown in Figure 101,
page 139.
The following assumes that SRAM access is done
through M7020R Device 0. Figure 102, page 140
and Figure 103, page 141 show the timing dia-
gram for Device 0 and Device 7, respectively.
–
Cycle 1A:
The host ASIC applies the WRITE In-
struction on CMD[1:0] using CMDV = 1. The DQ
Bus supplies the address with DQ[20:19] set to
'10' to select the SRAM address. The host ASIC
selects the device for which the ID[4:0] matches
the DQ[25:21] lines. The host ASIC also sup-
plies SADR[23:21] on CMD[8:6] in this cycle.
Note:
CMD[2] must be set to '0' for SRAM
WRITE because Burst WRITEs into the SRAM
are not supported.
–
Cycle 1B:
The host ASIC continues to apply the
WRITE Instruction on CMD[1:0] using CMDV =
1. The DQ Bus supplies the address with
DQ[20:19] set to '10' to select the SRAM ad-
dress.
Note:
CMD[2] must be set to '0' for SRAM
WRITE because Burst WRITEs into the SRAM
are not supported.
–
Cycle 2:
The host ASIC continues to drive
DQ[67:0]. The data in this cycle is not used by
the M7020R device.
–
Cycle 3:
The host ASIC continues to drive
DQ[67:0]. The data in this cycle is not used by
the M7020R device.
At the end of cycle 3, a new command can begin.
The WRITE is a pipelined operation. The WRITE
Cycle appears at the SRAM Bus, however, with
the same latency as that of a SEARCH Instruction,
as measured from the second cycle of the WRITE
command.
相關PDF資料
PDF描述
M7020R-083ZA1T 32K x 68-bit Entry NETWORK SEARCH ENGINE
M7020R 32K x 68-bit Entry NETWORK SEARCH ENGINE
M72DW64000B 64Mbit (x8/ x16, Multiple Bank, Boot Block) Flash Memory and 16Mbit Pseudo SRAM, 3V Supply, Multiple Memory Product
M72DW64000B70ZT 64Mbit (x8/ x16, Multiple Bank, Boot Block) Flash Memory and 16Mbit Pseudo SRAM, 3V Supply, Multiple Memory Product
M72DW64000B90ZT 64Mbit (x8/ x16, Multiple Bank, Boot Block) Flash Memory and 16Mbit Pseudo SRAM, 3V Supply, Multiple Memory Product
相關代理商/技術參數(shù)
參數(shù)描述
M7020R-083ZA1T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32K x 68-bit Entry NETWORK SEARCH ENGINE
M702-230442 功能描述:火線接頭 IEEE 1394 SMT 4P HORIZONTAL RoHS:否 制造商:Molex 產(chǎn)品:IEEE 1394 Firewire Connectors 標準:IEEE 1394 位置/觸點數(shù)量:6 節(jié)距:2 mm 觸點電鍍:Unplated 觸點材料:Phosphor Bronze 型式:Female 電流額定值:0.5 A 安裝風格:Through Hole 端接類型:Solder Tab 連接器類型:Firewire Receptacle
M702-230642 功能描述:火線接頭 IEEE 1394 SMT 6P HORIZONTAL RoHS:否 制造商:Molex 產(chǎn)品:IEEE 1394 Firewire Connectors 標準:IEEE 1394 位置/觸點數(shù)量:6 節(jié)距:2 mm 觸點電鍍:Unplated 觸點材料:Phosphor Bronze 型式:Female 電流額定值:0.5 A 安裝風格:Through Hole 端接類型:Solder Tab 連接器類型:Firewire Receptacle
M7023 制造商:Tamura Corporation of America 功能描述:
M7027 功能描述:數(shù)字萬用表 Dual Display Multime 0.3% Accuracy RoHS:否 制造商:Tektronix 產(chǎn)品:Multimeters 類型:Bench 準確性:0.04 % 電壓范圍:2 V to 2 kV 電阻范圍: 電容范圍: 顯示計數(shù): 頻率:10 Hz to 45 Hz, 850 Hz to 1 MHz 測距: 真均方根值: 數(shù)據(jù)保持:
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*