參數(shù)資料
型號: M7020R-066ZA1T
廠商: 意法半導(dǎo)體
英文描述: 32K x 68-bit Entry NETWORK SEARCH ENGINE
中文描述: 32K的× 68位進(jìn)入網(wǎng)絡(luò)搜索引擎
文件頁數(shù): 146/150頁
文件大?。?/td> 996K
代理商: M7020R-066ZA1T
M7020R
146/150
JTAG (1149.1) TESTING
The M7020R supports the Test Access Port and
Boundary Scan Architecture as specified in the
IEEE JTAG standard 1149.1. The pin interface to
the chip consists of five signals with the standard
definitions: TCK, TMS, TDI, TDO, and TRST_L.
Table 51 describes the operations that the test ac-
cess port controller supports and Table 52 de-
scribes the TAP Device ID Register.
Note:
To disable JTAG functionality, connect the
TCK, TMS, and TDI pins to Ground, and TRST_L
to V
DD
.
Table 51. Supported Operations
Table 52. TAP Device ID Register
Instruction
Type
Description
SAMPLE/PRELOAD
Mandatory
Sample/Preload.
Loads the values of signals going to and from IO
pins into the boundary scan shift register to provide a snapshot of
the normal functional operation.
EXTEST
Mandatory
External Test.
Uses boundary scan values shifted in from TAP to
test connectivity external to the device.
INTEST
Optional
Internal Test.
Allows slow-speed, functional testing of the device
using the boundary scan register to provide the I/O values.
Field
Range
Initial Value
Description
Revision
[31:28]
0001
Revision Number.
This is the current device revision number.
Numbers start from one and increment by one for each revision of
the device.
Part #
[27:12]
0000 0000 0000 0001
This is the part number for this device.
MFID
[11:1]
000_1101_1100
Manufacturer ID.
This field is the same as the manufacturer ID
used in the TAP controller.
LSB
[0]
1
Least Significant Bit
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