Dual I2S Stereo Audio Codec 52 ____________" />
參數(shù)資料
型號: MAX9880AETM+T
廠商: Maxim Integrated Products
文件頁數(shù): 48/70頁
文件大?。?/td> 0K
描述: IC CODEC AUDIO STEREO 48TQFN
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
類型: 立體聲音頻
數(shù)據(jù)接口: I²C,I²S,串行,SPI?
ADC / DAC 數(shù)量: 2 / 2
三角積分調(diào)變:
動態(tài)范圍,標準 ADC / DAC (db): 82 / 96
電壓 - 電源,模擬: 1.65 V ~ 1.95 V
電壓 - 電源,數(shù)字: 1.65 V ~ 1.95 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-WFQFN 裸露焊盤
供應商設備封裝: 48-TQFN-EP(6x6)
包裝: 帶卷 (TR)
MAX9880A
Low-Power, High-Performance
Dual I2S Stereo Audio Codec
52
______________________________________________________________________________________
MIC
GND
HPR
HPL
LOUTP
ROUTP
MICBIAS
JACKSNS/AUX
MICLP
Figure 8. Typical Configuration for Headset Detection
Debounce (JDEB)
Configures the JDET debounce time for changes to
JKSNS[1:0] according to Table 22.
For jack plug insertion/removal, the sequence of events
is as follows:
Jack insertion: No jack is present. The MAX9880A has
a power supply and is in low-power sleep mode
(LOUTP/ROUTP are high impedance). When the
JDETEN I2C bit is set, the JACKSNS pin has weak
pullups to MICVDD. When a jack is subsequently insert-
ed, JACKSNS should change state (indicated by I2C
bits JKSNS[1:0]), and this causes the IRQ pin to be
pulled low, which can trigger a system wakeup.
Jack present: After an interrupt has been sent to the
system controller, the I2C must indicate unambiguously
that a jack is present when the I2C registers are read.
This is done with the JDET I2C bit, which goes high
when there is a change of state of the JKSNS[1:0] bits.
The MAX9880A jack-detect system monitors the
JACKSNS pin and reports the voltage level as high
(> 95% x MICBIAS), mid, or low (< 10% x MICBIAS).
When connected to the microphone pin of the headset
jack, this window comparator allows detection of:
No headset (high)
Cellular headset with microphone (high
→ mid)
Stereo headset without microphone (high
→ low)
Cellular headset button press (mid
→ low → mid)
Headset removal (low or mid
→ high)
Jack removal: A jack is present. All output poles
(headphones/line outs) are assumed driven by a low
impedance amplifier. All input poles (microphones) are
assumed to be biased with a voltage above ground but
below 95% of the MICBIAS voltage. For the MAX9880A
to sense when a jack is removed, the JACKSNS pin
must be connected to the jack in such a way as to
ensure either the JACKSNS pin gets pulled above 95%
of MICBIAS (as would happen if JACKSNS is hooked to
a microphone pole) or it changes state from low to high
or vice versa (as would happen if JACKSNS is hooked
to a ground pole which goes high impedance when the
jack is removed, or is hooked to a regular jack insertion
tab that shorts to ground when the jack is removed).
Subsequently, IRQ is pulled low.
Jack absent: After an interrupt has been sent to the
system controller, the I2C must indicate unambiguously
that a jack is not present when the I2C registers are
read. This is indicated by reading the status of the
JKSNS[1:0] I2C read bits.
Table 22. Debounce Time
JDEB
DEBOUNCE (ms)
00
25
01
50
10
100
11
200
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相關代理商/技術參數(shù)
參數(shù)描述
MAX9880AEVKIT# 功能描述:音頻 IC 開發(fā)工具 MAX9880A Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
MAX9880AEVKIT+ 功能描述:音頻 IC 開發(fā)工具 MAX9880A Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
MAX9880AEWM+T 功能描述:接口—CODEC Stereo Audio CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
MAX9880ETM+ 制造商:Maxim Integrated Products 功能描述:AUDIO CODEC - Rail/Tube
MAX9880EVKIT+ 制造商:Maxim Integrated Products 功能描述:STEREO AUDIO CODEC - Boxed Product (Development Kits)