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參數(shù)資料
| 型號(hào)： | MAX9880AETM+T |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 57/70頁(yè) |
| 文件大小： | 0K |
| 描述： | IC CODEC AUDIO STEREO 48TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 立體聲音頻 |
| 數(shù)據(jù)接口： | I²C，I²S，串行，SPI? |
| ADC / DAC 數(shù)量： | 2 / 2 |
| 三角積分調(diào)變： | 是 |
| 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db)： | 82 / 96 |
| 電壓 - 電源，模擬： | 1.65 V ~ 1.95 V |
| 電壓 - 電源，數(shù)字： | 1.65 V ~ 1.95 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-TQFN-EP（6x6） |
| 包裝： | 帶卷 (TR) |
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MAX9880A
Low-Power, High-Performance
Dual I2S Stereo Audio Codec
60
______________________________________________________________________________________
1
SCL
START
CONDITION
SDA
29
CLOCK PULSE FOR
ACKNOWLEDGMENT
ACKNOWLEDGE
NOT ACKNOWLEDGE
Figure 16. Acknowledge
A
0
SLAVE ADDRESS
REGISTER ADDRESS
DATA BYTE
ACKNOWLEDGE FROM MAX9880A
R/W
1 BYTE
AUTOINCREMENT INTERNAL
REGISTER ADDRESS POINTER
ACKNOWLEDGE FROM MAX9880A
B1
B0
B3
B2
B5
B4
B7
B6
S
A
P
Figure 17. Writing 1 Byte of Data
Slave Address
The slave address is defined as the seven most signifi-
cant bits (MSBs) followed by the read/write bit. For the
MAX9880A, the seven most significant bits are
0010000. Setting the read/write bit to 1 (slave address
= 0x21) configures the MAX9880A for read mode.
Setting the read/write bit to 0 (slave address = 0x20)
configures the MAX9880A for write mode. The address
is the first byte of information sent to the MAX9880A
after the START condition.
Acknowledge
The acknowledge bit (ACK) is a clocked 9th bit that the
MAX9880A uses to handshake receipt each byte of
data when in write mode (see Figure 16). The
MAX9880A pulls down SDA during the entire master-
generated 9th clock pulse if the previous byte is suc-
cessfully received. Monitoring ACK allows for detection
of unsuccessful data transfers. An unsuccessful data
transfer occurs if a receiving device is busy or if a sys-
tem fault has occurred. In the event of an unsuccessful
data transfer, the bus master retries communication.
The master pulls down SDA during the 9th clock cycle
to acknowledge receipt of data when the MAX9880A is
in read mode. An acknowledge is sent by the master
after each read byte to allow data transfer to continue.
A not acknowledge is sent when the master reads the
final byte of data from the MAX9880A, followed by a
STOP condition.
Write Data Format
A write to the MAX9880A includes transmission of a
START condition, the slave address with the R/W bit set
to 0, 1 byte of data to configure the internal register
address pointer, 1 or more bytes of data, and a STOP
condition. Figure 17 illustrates the proper frame format
for writing 1 byte of data to the MAX9880A. Figure 18
illustrates the frame format for writing n bytes of data to
the MAX9880A.
The slave address with the R/W bit set to 0 indicates
that the master intends to write data to the MAX9880A.
The MAX9880A acknowledges receipt of the address
byte during the master-generated 9th SCL pulse.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9880AEVKIT# | 功能描述:音頻 IC 開發(fā)工具 MAX9880A Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V |
| MAX9880AEVKIT+ | 功能描述:音頻 IC 開發(fā)工具 MAX9880A Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V |
| MAX9880AEWM+T | 功能描述:接口—CODEC Stereo Audio CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| MAX9880ETM+ | 制造商:Maxim Integrated Products 功能描述:AUDIO CODEC - Rail/Tube |
| MAX9880EVKIT+ | 制造商:Maxim Integrated Products 功能描述:STEREO AUDIO CODEC - Boxed Product (Development Kits) |
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