Dual I2S Stereo Audio Codec 58 ____________" />
參數(shù)資料
型號: MAX9880AETM+T
廠商: Maxim Integrated Products
文件頁數(shù): 54/70頁
文件大小: 0K
描述: IC CODEC AUDIO STEREO 48TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
類型: 立體聲音頻
數(shù)據(jù)接口: I²C,I²S,串行,SPI?
ADC / DAC 數(shù)量: 2 / 2
三角積分調(diào)變:
動態(tài)范圍,標(biāo)準(zhǔn) ADC / DAC (db): 82 / 96
電壓 - 電源,模擬: 1.65 V ~ 1.95 V
電壓 - 電源,數(shù)字: 1.65 V ~ 1.95 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-TQFN-EP(6x6)
包裝: 帶卷 (TR)
MAX9880A
Low-Power, High-Performance
Dual I2S Stereo Audio Codec
58
______________________________________________________________________________________
CS
SCLK
DIN
DOUT
HIGH-Z
R/W
ADDR9
ADDR0
UNUSED4
UNUSED0
D7
D0
1 DATA BYTE
Figure 12. Reading 1 Byte of Data from the MAX9880A
SCLK
DIN
DOUT
HIGH-Z
R/W
ADDR9
ADDR0
UNUSED4
UNUSED0
D7
D0
1 DATA BYTE
CS
D7
D0
AUTOINCREMENT INTERNAL
REGISTER ADDRESS POINTER
Figure 13. Reading n Bytes of Data from the MAX9880A
SMBus is a trademark of Intel Corp.
do not change until the transfer is complete. The DOUT
output is high impedance when writing the register
address bits. If the correct register address is decod-
ed, DOUT is driven low at the first rising clock edge
after the first unused bit.
Figure 12 illustrates the proper frame format for reading
1 byte of data from the MAX9880A.
When reading data from the MAX9880A, the address
pointer autoincrements by one register address if CS is
held low after reading the first 8 data bits. For each
subsequent eight clock cycles, a byte of data is read.
This autoincrement feature allows a master to read
sequential registers within one continuous SPI register
address range from 0x200 to 0x227. The register
address does not autoincrement if a read is initiated at
a register address lower than 0x200. If the register
address increments beyond 0x227, the DOUT output is
high impedance. Figure 13 illustrates the proper format
for reading multiple bytes of data.
I2C Serial Interface
The MAX9880A features an I2C/SMBus-compatible,
2-wire serial interface consisting of a serial-data line
(SDA) and a serial-clock line (SCL). SDA and SCL
facilitate communication between the MAX9880A and
the master at clock rates up to 400kHz. Figure 14
shows the 2-wire interface timing diagram. The master
generates SCL and initiates data transfer on the bus.
The master device writes data to the MAX9880A by
transmitting the proper slave address followed by the
register address and then the data word. Each transmit
sequence is framed by a START (S) or repeated
START (Sr) condition and a STOP (P) condition. Each
word transmitted to the MAX9880A is 8 bits long and is
followed by an acknowledge clock pulse. A master
reading data from the MAX9880A transmits the proper
slave address followed by a series of nine SCL pulses.
The MAX9880A transmits data on SDA in sync with the
master-generated SCL pulses. The master acknowl-
edges receipt of each byte of data. Each read
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX9880AEVKIT# 功能描述:音頻 IC 開發(fā)工具 MAX9880A Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
MAX9880AEVKIT+ 功能描述:音頻 IC 開發(fā)工具 MAX9880A Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
MAX9880AEWM+T 功能描述:接口—CODEC Stereo Audio CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
MAX9880ETM+ 制造商:Maxim Integrated Products 功能描述:AUDIO CODEC - Rail/Tube
MAX9880EVKIT+ 制造商:Maxim Integrated Products 功能描述:STEREO AUDIO CODEC - Boxed Product (Development Kits)