參數(shù)資料
型號(hào): MB86860
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 200 MHz, RISC PROCESSOR, PBGA352
封裝: PLASTIC, BGA-352
文件頁(yè)數(shù): 51/70頁(yè)
文件大小: 1395K
代理商: MB86860
Specifications subject to changes without prior notice
62
MB86860 SPARClite
8.
Low Power Consumption Mode
The SS200 has 2 modes for low power consumption- Sleep Mode and Stop Mode. Sleep Mode stops the clocks
provided by Core and peripheral functions while the PLL is operating. Continuous normal operation is possible after
Sleep Mode cancellation.
Stop Mode stops the PLL, and all internal clocks stop. A reset must be input in order to
restart.
Caches must be in OFF status when converting to low power consumption mode. Relationships between all
modes when in Cache OFF Mode and caches in OFF status and operations in Normal Mode which use caches are
shown below.
Figure 8-1 Power Save State Diagram
1. CACHE-OFF
Converts to this Mode after reset
Sensamp also stops in cache OFF
Converts to Normal Mode by setting ICCR Register
Converts to SLEEP Mode by setting Sleep Mode Register
2.
NORMAL Mode
Conversion only possible from CACHE-OFF Mode
Converts to CACHE-OFF Mode by setting ICCR Register
3.
SLEEP Mode
Conversion only possible froim CACHE-OFF Mode.
Except for PLL, clocks stop.
PDOWN Pin is asserted during Sleep Mode period.
During Sleep Mode conversion the SDRAM I/F issues a self-refresh command to SDRAM.
SPARClite bus right open.
Returns to CACHE-OFF Mode if WKUP# Pin is asserted.
Converts to STOP Mode if STOP# Pin is asserted.
4.
STOP Mode
Conversion only possible from SLEEP Mode.
Stops PLL and all internal clocks.
Restart only possible by reset.
#When converting from CACHE-OFF Mode to NORMAL Mode, a cache flush (access to ASI0X31space) before the
ICCR Register settings is required.
CACHE-OFF
NORMAL
SLEEP
STOP
RESET#
STOP#
WKUP#
RESET#
(SMR)
(ASR31)
(ASR30)
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