參數(shù)資料
型號(hào): MB86960APF-G
元件分類: 微控制器/微處理器
英文描述: 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100
封裝: PLASTIC, QFP-100
文件頁(yè)數(shù): 58/66頁(yè)
文件大?。?/td> 376K
代理商: MB86960APF-G
MB86960
61
Figure 35. Receive Timing
CRS
RCK
t2
t5
t1
t3
RXD
t4
t7
t8
(IF IT IS NOT MASKED)
1ST BIT
LAST BIT
t5
INT
Table 35. Receive Timing (for Encoder/Decoder Bypass mode)
Symbol
Parameter Description
Min.
Typ.
Max.
Units
t1
Receive clock low width
35
ns
t2
Receive clock high width
35
ns
t3
Receive data setup
10
ns
t4
Receive data hold
10
ns
t5
Receive carrier sense setup
10
ns
t6
Receive carrier sense hold
7
RCK cycles
t7
Last bit of good packet received to interrupt
40
RCK cycles
t8
Receive interrupt after bad packet
15
RCK cycles
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