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參數(shù)資料
| 型號： | MBM29DL64DF70PBT |
| 廠商： | FUJITSU LTD |
| 元件分類： | DRAM |
| 英文描述： | FLASH MEMORY CMOS 64 M (8 M X 8/4 M X 16) BIT |
| 中文描述： | 4M X 16 FLASH 3V PROM, 70 ns, PBGA48 |
| 封裝： | PLASTIC, FBGA-48 |
| 文件頁數(shù)： | 26/68頁 |
| 文件大?。?/td> | 854K |
| 代理商： | MBM29DL64DF70PBT |
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MBM29DL64DF
-70
26
addresses, except for A
6
, A
3
, A
2
, A
1
and A
0
are DON’T CARES. Address locations with A
1
=
V
IL
are reserved for
Autoselect manufacturer and device codes. A
-1
requires applying to V
IL
on byte mode.
Whether the sector group is protected in the system can be determined by writing an Autoselect command.
Performing a read operation at the address location (BA) XX02h, where the higher order addresses (A
21
, A
20
,
A
19
, A
18
, A
17
, A
16
, A
15
, A
14
, A
13
, and A
12
) are the desired sector group address, will produce a logical “1” at DQ
0
for a protected sector group. Note that the bank addresses (A
21
, A
20
, A
19
) must be pointing to a specific bank
during the third write bus cycle of the Autoselect command. Then the Autoselect data can be read from that
bank while array data can still be read from the other bank. To read Autoselect data from the other bank, it must
be reset to read mode and then write the Autoselect command to the other bank. See Sector Group Protection
Verify Autoselect Codes.
Temporary Sector Group Unprotection
This feature allows temporary unprotection of previously protected sector groups of the device in order to change
data. The Sector Group Unprotection mode is activated by setting the RESET pin to high voltage (V
ID
) . During
this mode, formerly protected sector groups can be programmed or erased by selecting the sector group ad-
dresses. Once the V
ID
is taken away from the RESET pin, all the previously protected sector groups will be
protected again. Refer to “(6) Temporary Sector Group Unprotection Algorithm” in
I
FLOW CHRAT.
RESET
Hardware Reset
The device is reset by driving the RESET pin to V
IL
. The RESET pin works pulse requirement and has to be kept
low (V
IL
) for at least “t
RP
” in order to properly reset the internal state machine. Any operation in the process of
being executed is terminated and the internal state machine is reset to the read mode “t
READY
” after the RESET
pin is driven low. Furthermore once the RESET pin goes high the device requires an additional “t
RH
” before it
allows read access. When the RESET pin is low, the device will be in the standby mode for the duration of the
pulse and all the data output pins are tri-stated. If a hardware reset occurs during a program or erase operation,
the data at that particular location is corrupted. Please note that the RY/BY output signal should be ignored
during the RESET pulse. See “(11) RESET, RY/BY Timing Diagram” in
I
TIMING DIAGRAM for the timing
diagram. Refer to “Temporary Sector Group Unprotection” for additional functionality.
Byte/Word Configuration
BYTE pin selects Byte (8-bit) mode or Word (16-bit) mode for the device. When this pin is driven high, the device
operates in Word (16-bit) mode. Data is read and programmed at DQ
15
to DQ
0
. When this pin is driven low, the
device operates in Byte (8-bit) mode. In this mode the DQ
15
/A
-1
pin becomes the lowest address bit, and DQ
14
to DQ
8
bits are tri-stated. However the command bus cycle is always an 8-bit operation and hence commands
are written at DQ
7
to DQ
0
and DQ
15
to DQ
8
bits are ignored. Refer to Timing Diagram for Word Mode/Byte Mode
Configuration.
Boot Block Sector Protection
The Write Protection function provides a hardware method of protecting certain boot sectors without using V
ID
.
This function is one of two provided by the WP/ACC pin.
If the system asserts V
IL
on the WP/ACC pin, the device disables program and erase functions in the two
outermost 8 Kbytes on both ends of boot sectors (SA0, SA1, SA140, and SA141) independently of whether
those sectors are protected or unprotected using the method described in “Sector Group Protection.”
If the system asserts V
IH
on the WP/ACC pin, the device reverts to whether the two outermost 8 Kbyte on both
ends of boot sectors were last set to be protected or unprotected. Sector group protection or unprotection for
these four sectors depends on whether they ware last protected or unprotected using the method described in
“Sector Group Protection.”
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MBM29DL64DF70TN | FLASH MEMORY CMOS 64 M (8 M X 8/4 M X 16) BIT |
| MBM29DL800TA | 8M (1M X 8/512K X 16) BIT |
| MBM29DL800BA-70 | LED Lamp; Bulb Size:T-1 3/4; LED Color:Red; Luminous Intensity:2000ucd; Viewing Angle:16 ; Forward Current:20mA; Forward Voltage:1.9V; Operating Temperature Range:-25 C to +85 C; Color:Red; Leaded Process Compatible:Yes RoHS Compliant: Yes |
| MBM29DL800BA-90 | LED Lamp; Bulb Size:T-1 3/4; LED Color:Yellow; Luminous Intensity:2500ucd; Viewing Angle:15 ; Forward Current:20mA; Forward Voltage:2.1V; Operating Temperature Range:-40 C to +85 C; Color:Yellow; Leaded Process Compatible:Yes RoHS Compliant: Yes |
| MBM29DL800TA-12 | 122 x 32 pixel format, LED or EL Backlight available |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MBM29DL64DF70TN | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:FLASH MEMORY CMOS 64 M (8 M X 8/4 M X 16) BIT |
| MBM29DL800BA | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M X 8/512K X 16) BIT |
| MBM29DL800BA-12 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M X 8/512K X 16) BIT |
| MBM29DL800BA-70 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M X 8/512K X 16) BIT |
| MBM29DL800BA-70PBT | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:FLASH MEMORY CMOS 8M (1M x 8 / 512K x 16) BIT |
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