Table of Contents
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MC68302 USER’S MANUAL
MOTOROLA
Appendix B
Development Tools and Support
Software Overview.....................................................................................B-3
MC68302FADS..........................................................................................B-8
Figure B-1.
Figure B-2.
Appendix C
RISC Microcode from RAM
Figure C-1.
CP Architecture Running RAM Microcode.................................................C-1
Appendix D
MC68302 Applications
Figure D-1.
Figure D-2.
Figure D-3.
Figure D-4.
Figure D-5.
Figure D-6.
Figure D-7.
Figure D-8.
Figure D-9.
Figure D-10. Burst Mode Cycles...................................................................................D-29
Figure D-11. ISDN Voice/Data Terminal.......................................................................D-30
Figure D-12. IDL Bus Boundaries.................................................................................D-32
Figure D-13. IDL Frame Structure.................................................................................D-33
Figure D-14. IDL Bus to Other Slaves ..........................................................................D-34
Figure D-15. Serial Interface Configuration...................................................................D-35
Figure D-16. SCP Bus Interconnection.........................................................................D-38
Figure D-17. Discrete Signal Interconnection ...............................................................D-40
Figure D-18. CODEC/IDL Electrical Connection...........................................................D-41
Figure D-19. Typical Slave Mode Example...................................................................D-42
Figure D-20. Dual Master-Slave System.......................................................................D-46
Figure D-21. NMSI Pin Definitions................................................................................D-48
Figure D-22. Multiplexed Modes Example....................................................................D-49
Figure D-23. Simplest Transmit Case in NMSI.............................................................D-53
Figure D-24. Simplest Receive Case in NMSI..............................................................D-53
Figure D-25. Using CTS In the NMSI Transmit Case ...................................................D-54
Figure D-26. Using CD (Sync) In the NMSI Transmit Case..........................................D-55
Figure D-27. Using CD (Sync) in the NMSI Receive Case...........................................D-56
Figure D-28. External Loopback with RTS Connected to CD.......................................D-56
Figure D-29. Routing Channels in PCM Envelope Mode..............................................D-61
Figure D-30. PCM Transmission Timing Technique.....................................................D-63
Figure D-31. SCP Timing..............................................................................................D-69
Figure D-32. Local Talk Adaptor Board ........................................................................D-71
MC68302 Minimum System Configuration (Sheet 1 of 2)..........................D-2
MC68302 Minimum System Configuration (Sheet 2 of 2)..........................D-3
Transmit and Receive BD Structure...........................................................D-7
Transmit and Receive BD Tables ..............................................................D-8
Pointer during Execution............................................................................D-9
Transmit and Receive BD Tables and Buffers.........................................D-18
Typical IDMA External Cycles (Normal Operation)..................................D-27
Typical IDMA External Cycles Showing Block Transfer Termination.......D-28
Typical IDMA Source to Word Destination IDMA Cycles.........................D-28