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參數(shù)資料
| 型號(hào)： | MC68HC05BD3P |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁數(shù)： | 66/112頁 |
| 文件大?。?/td> | 864K |
| 代理商： | MC68HC05BD3P |
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MC68HC05BD3
MOTOROLA
7-11
M-BUS SERIAL INTERFACE
7
7.4
Programming Considerations
7.4.1
Initialization
Reset will put the M-Bus Control register to its default status. Before the interface can be used to
transfer serial data, the following initialization procedure must be carried out.
1) Update Frequency Divider Register (MFDR) to select an SCL frequency.
2) Update M-Bus Address Register (MADR) to dene its own slave address.
3) Set MEN bit of M-Bus Control Register (MCR) to enable the M-Bus interface
system.
4) Modify the bits of M-Bus Control Register (MCR) to select Master/Slave
mode, Transmit/Receive mode, interrupt enable or not.
7.4.2
Generation of a START Signal and
the First Byte of Data Transfer
After completion of the initialization procedure, serial data can be transmitted by selecting the
master transmit mode. If the device is connected to a multi-master bus system, the state of the
M-Bus busy bit (MBB) must be tested to check if the serial bus is free. If the bus is free (MBB=0),
the START condition and the rst byte (the slave address) can be sent. An example program which
generates the START signal and transmits the rst data byte (slave address) is shown below:
SEI
; DISABLE INTERRUPT
CHFLAG
BRSET
5,MSR,CHFLAG
; CHECK THE MBB BIT OF THE
; STATUS REGISTER. IF IT IS
; SET, WAIT UNTIL IT IS CLEAR
TXSTART
BSET
4,MCR
; SET TRANSMIT MODE
BSET
5,MCR
; SET MASTER MODE
; i.e. GENERATE START CONDITION
LDA
#CALLING
; GET THE CALLING ADDRESS
STA
MDR
; TRANSMIT THE CALLING
; ADDRESS
CLI
; ENABLE INTERRUPT
7.4.3
Software Responses after Transmission or
Reception of a Byte
Upon the completion of the transmission or reception of a data byte, the data transferring bit (MCF)
will be set, indicating one byte communication has been nished. The M-Bus interrupt bit (MIF)
will also be set to generate an M-Bus interrupt if the interrupt is enabled. Software must clear the
TPG
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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