參數(shù)資料
型號: MC68HC05CJ4FB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44
封裝: PLASTIC, QFP-44
文件頁數(shù): 65/114頁
文件大?。?/td> 4047K
代理商: MC68HC05CJ4FB
GENERAL RELEASE SPECIFICATION
SERIAL COMMUNICATIONS INTERFACE
Rev. 2.1
8-17
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8.4.3 SCI Control Register 2 (SCCR2)
Read: anytime
Write: anytime
TIE — Transmit Interrupt Enable
When this control bit is set to a one, an SCI interrupt will be requested whenever
the TDRE status flag is set.
TCIE — Transmit Complete Interrupt Enable
When this control bit is set to a one, an SCI interrupt will be requested whenever
the TC status flag is set.
RIE — Receiver Interrupt Enable
When this control bit is set to a one, an SCI interrupt will be requested whenever
the RDRF status flag or the OR status flag is set.
ILIE — Idle Line Interrupt Enable
When this control bit is set to a one, an SCI interrupt will be requested whenever
the IDLE status flag is set.
TE — Transmitter Enable
When this control bit is set, the SCI transmit logic is enabled and the TXD pin
(port D bit 1) is dedicated to the transmitter. The TE bit can be used to queue an
idle preamble.
RE — Receiver Enable
This control bit (when set) enables the SCI receive circuitry.
RW — Receiver Wake-up Control
When set this control bit enables the wake-up function and inhibits further
receiver interrupts. Normally, hardware wakes the receiver by automatically
clearing this bit.
Bit 7
654321
Bit 0
$000F
SCCR2
Read:
TIE
TCIE
RIE
ILIE
TE
RE
RWU
SBK
Write:
Reset:
00000000
Figure 8-10. SCI Control Register 2
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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