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參數(shù)資料
| 型號(hào)： | MC68HC05E0FN |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁(yè)數(shù)： | 41/96頁(yè) |
| 文件大?。?/td> | 890K |
| 代理商： | MC68HC05E0FN |
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4
MOTOROLA
4-10
MC68HC05E0
RESETS, INTERRUPTS AND LOW POWER MODES
Note:
PITW (Program Interrupt Type Wake-up function), bit 4 of the Timer Control Register
($000C) provides additional control of wake-up interrupts on Port C by selecting either
edge or level sensitive triggering.
4.3
Low Power Modes
4.3.1
STOP
The STOP instruction places the MCU in its lowest power consumption mode. The processor can
only be started again by an external interrupt (on the INTX pin) (if enabled), a wake-up interrupt
(if enabled) or reset. The oscillator is stopped, all CPU and timer functions are stopped, and an
oscillator stabilisation delay of 4064 cycles is required to start the processor again.
Note:
The RTI Timer restarts immediately after exiting the STOP state.
During the STOP mode, the RTI interrupt ag and interrupt enable bits are cleared by internal
hardware to remove any pending interrupt requests. The RTI Timer prescaler is also cleared. The
I bit in the CCR is cleared to enable external interrupts or wake-up function interrupts. All other
bits and registers, and memory remain unaltered. All input/output lines remain unchanged.
Note:
Pending interrupts from Timer A, Timer B, and SI are not cleared by the stop instruction.
The external interrupt INTX can be disabled by the External Interrupt Mask bit (INTMX)
in the Interrupt Control Register ($000E).
4.3.2
WAIT
The WAIT instruction places the MCU in a low-power consumption mode, but the WAIT mode
consumes more power than the STOP mode. All CPU action is suspended, but the timers remain
active. An interrupt from the timer can cause the MCU to exit the WAIT mode. During the WAIT
mode, the I bit in the CCR is cleared to enable interrupts. All other registers, memory and
input/output lines remain in their previous state.
46
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