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參數(shù)資料
| 型號： | MC68HC05J5P |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁數(shù)： | 44/69頁 |
| 文件大?。?/td> | 394K |
| 代理商： | MC68HC05J5P |
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December 11, 1996
GENERAL RELEASE SPECIFICATION
MC68HC05J5
MULTI-FUNCTION TIMER
MOTOROLA
REV 1.1
8-1
SECTION 8
MULTI-FUNCTION TIMER
The MC68HC05J5 timer is a 15-stage multi-function ripple counter. The features
include Timer Over Flow (TOF), Power-On Reset (POR), Real Time Interrupt
(RTI), and COP Watchdog Timer.
Figure 8-1. Multi-Function Timer Block Diagram
As shown in Figure 8-1, the Timer is driven by the timer clock, NTF1, divided by
four (4). NTF1 has the same phase and frequency as the processor bus clock,
PH2, but is not stopped by the WAIT or HALT Modes. This signal drives an 8-bit
ripple counter. The value of this 8-bit ripple counter can be read by the CPU at any
time by accessing the Timer Counter Register (TCR) at address $09. A timer over-
ow function is implemented on the last stage of this counter, giving a possible
COP
Clear
MC68HC05 Internal Bus
$09 TCR
7-bit counter
Interrupt Circuit
$08 TCSR
RTI Select Circuit
Overflow
Circuit
Detect
COP Watchdog
Timer
To Reset
Logic
To Interrupt
Logic
8
fop/2
2
fop/2
10
POR
TCBP
TCSR
TCR
Internal
Timer Clock
(NTF1)
TOF
RTIF
TOFE RTIE
RT1
RT0
RTIFR
TOFR
Timer Control & Status Register
Timer Counter Register (TCR)
÷4
÷8
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