參數(shù)資料
型號： MC68HC705CJ4FB
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQFP44
封裝： PLASTIC, QFP-44
文件頁數(shù)： 73/114頁
文件大?。?/td> 4047K
代理商： MC68HC705CJ4FB
GENERAL RELEASE SPECIFICATION
SERIAL PERIPHERAL INTERFACE
MC68HC(7)05CJ4
9-4
Rev. 2.1
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9.3 SPI Registers
The following subsections describe the SPI registers.
9.3.1 SPI Control Register (SPCR)
Read: anytime
Write: anytime
SPIE — SPI Interrupt Enable
When this bit is set to a one a hardware interrupt sequence is requested each
time the SPIF or MODF status flag is set. SPI interrupts are inhibited if this bit is
clear or if the I bit in the condition code register is one.
SPE — SPI System Enable
When the SPE bit is set the port D bits 2, 3, 4, and 5 are dedicated to the SPI
function.
DOD — Direction Of Data
This bit determines the direction of data flow in or out of the serial shift register.
When set, data is transferred LSB first. When cleared (the default state), data is
transferred MSB first.
NOTE
Figure 9-2 assumes a value of zero for this bit.
MSTR — Master/Slave Mode Select
0 = Slave mode
1 = Master mode
Bit 7
654321
Bit 0
$000A
SPCR
Read:
SPIE
SPE
DOD
MSTR
CPOL
CPHA
SPR1
SPR0
Write:
Reset:
0000
UUUU
U = Unaffected
Figure 9-1. SPI Control Register
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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