參數(shù)資料
型號: MC68HSC05P1ADWR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PDSO28
封裝: SOIC-28
文件頁數(shù): 77/124頁
文件大小: 623K
代理商: MC68HSC05P1ADWR2
NON-DISCLOSURE
AGREEMENT
REQUIRED
Input/Output Ports
General Release Specification
MC68HC05P1A Rev. 3.0
56
Input/Output Ports
MOTOROLA
7.3 Port A
Port A is an 8-bit bidirectional port, which can share its pins with the
interrupt system as shown in Figure 7-1. Each port A pin is controlled by
the corresponding bits in a data direction register and a data register.
The port A data register is located at address $0000. The port A data
direction register (DDRA) is located at address $0004. Reset clears the
DDRA, thereby initializing port A as an input port. The port A data
register is unaffected by reset.
Figure 7-1. Port A I/O Circuitry
PULLUP
READ $0000
WRITE $0000
READ $0004
DATA
REGISTER BIT
TO
INTERRUPT
SYSTEM
I/O
PIN
OUTPUT
MASK OPTION
(PULLUP INHIBIT)
INTERNAL HC05
DATA BUS
RESET
(RST)
WRITE $0004
DATA
DIRECTION
REGISTER BIT
VDD
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