參數(shù)資料
型號(hào): MC68HSC05P1ADWR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PDSO28
封裝: SOIC-28
文件頁數(shù): 83/124頁
文件大?。?/td> 623K
代理商: MC68HSC05P1ADWR2
Input/Output Ports
I/O Port Programming
MC68HC05P1A Rev. 3.0
General Release Specification
MOTOROLA
Input/Output Ports
61
NON-DISCLOSURE
AGREEMENT
REQUIRED
NOTE:
To avoid generating a glitch on an I/O port pin, data should be written to
the I/O port data register before writing a logical 1 to the corresponding
data direction register.
At power-on or reset, all DDRs are cleared, which configures all port pins
as inputs. The DDRs are capable of being written to or read by the
processor. During the programmed output state, a read of the data
register will actually read the value of the output data latch and not the
level on the I/O port pin.
Table 7-4. Port D I/O Pin Functions
DDRD
I/O Pin
Mode
Accesses to
DDRD @ $0007
Accesses to Data
Register @ $0003
Read/Write
Read
Write
0
Input, Hi-Z
DDRD5
I/O Pin
*
1
Output
DDRD5
PD5
*Does not affect input, but stored to data register, PD7 is input-only
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