參數(shù)資料
型號： MC80C52TXXX-16SC
廠商： TEMIC SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CDIP40
文件頁數(shù)： 4/77頁
文件大小： 7480K
代理商： MC80C52TXXX-16SC
12
SAMA5D3 Series [DATASHEET]
11121D–ATARM–03-Apr-14
R6
VDDIOP1
GMAC
PB10
I/O
—
GTXER
O
RF1
I/O
—
PIO, I, PU, ST
V3
VDDIOP1
GMAC
PB11
I/O
—
GRXCK
I
RD1
I
—
PIO, I, PU, ST
P6
VDDIOP1
GMAC
PB12
I/O
—
GRXDV
I
PWMH3
O
—
PIO, I, PU, ST
V1
VDDIOP1
GMAC
PB13
I/O
—
GRXER
I
PWML3
O
—
PIO, I, PU, ST
R7
VDDIOP1
GMAC
PB14
I/O
—
GCRS
I
CANRX1
I
—
PIO, I, PU, ST
U3
VDDIOP1
GMAC
PB15
I/O
—
GCOL
I
CANTX1
O
—
PIO, I, PU, ST
P7
VDDIOP1
GMAC
PB16
I/O
—
GMDC
O
—
PIO, I, PU, ST
V2
VDDIOP1
GMAC
PB17
I/O
—
GMDIO
I/O
—
PIO, I, PU, ST
V5
VDDIOP1
GMAC
PB18
I/O
—
G125CK
I
—
PIO, I, PU, ST
T6
VDDIOP1
GMAC
PB19
I/O
—
MCI1_CDA
I/O
GTX4
O
—
PIO, I, PU, ST
N8
VDDIOP1
GMAC
PB20
I/O
—
MCI1_DA0
I/O
GTX5
O
—
PIO, I, PU, ST
U4
VDDIOP1
GMAC
PB21
I/O
—
MCI1_DA1
I/O
GTX6
O
—
PIO, I, PU, ST
M7
VDDIOP1
GMAC
PB22
I/O
—
MCI1_DA2
I/O
GTX7
O
—
PIO, I, PU, ST
U5
VDDIOP1
GMAC
PB23
I/O
—
MCI1_DA3
I/O
GRX4
I
—
PIO, I, PU, ST
M8
VDDIOP1
GMAC
PB24
I/O
—
MCI1_CK
I/O
GRX5
I
—
PIO, I, PU, ST
T5
VDDIOP1
GMAC
PB25
I/O
—
SCK1
I/O
GRX6
I
—
PIO, I, PU, ST
N9
VDDIOP1
GMAC
PB26
I/O
—
CTS1
I
GRX7
I
—
PIO, I, PU, ST
V4
VDDIOP1
GPIO
PB27
I/O
—
RTS1
O
G125CKO
O
—
PIO, I, PU, ST
M9
VDDIOP1
GPIO
PB28
I/O
—
RXD1
I
—
PIO, I, PU, ST
P8
VDDIOP1
GPIO
PB29
I/O
—
TXD1
O
—
PIO, I, PU, ST
M10
VDDIOP0
GPIO
PB30
I/O
—
DRXD
I
—
PIO, I, PU, ST
R9
VDDIOP0
GPIO
PB31
I/O
—
DTXD
O
—
PIO, I, PU, ST
D8
VDDIOP0
GPIO
PC0
I/O
—
ETX0
O
TIOA3
I/O
—
PIO, I, PU, ST
A4
VDDIOP0
GPIO
PC1
I/O
—
ETX1
O
TIOB3
I/O
—
PIO, I, PU, ST
E8
VDDIOP0
GPIO
PC2
I/O
—
ERX0
I
TCLK3
I
—
PIO, I, PU, ST
A3
VDDIOP0
GPIO
PC3
I/O
—
ERX1
I
TIOA4
I/O
—
PIO, I, PU, ST
A2
VDDIOP0
GPIO
PC4
I/O
—
ETXEN
O
TIOB4
I/O
—
PIO, I, PU, ST
F8
VDDIOP0
GPIO
PC5
I/O
—
ECRSDV
I
TCLK4
I
—
PIO, I, PU, ST
B3
VDDIOP0
GPIO
PC6
I/O
—
ERXER
I
TIOA5
I/O
—
PIO, I, PU, ST
G8
VDDIOP0
GPIO
PC7
I/O
—
EREFCK
I
TIOB5
I/O
—
PIO, I, PU, ST
B4
VDDIOP0
GPIO
PC8
I/O
—
EMDC
O
TCLK5
I
—
PIO, I, PU, ST
F7
VDDIOP0
GPIO
PC9
I/O
—
EMDIO
I/O
—
PIO, I, PU, ST
A1
VDDIOP0
GPIO
PC10
I/O
—
MCI2_CDA
I/O
—
LCDDAT20
O
PIO, I, PU, ST
D7
VDDIOP0
GPIO
PC11
I/O
—
MCI2_DA0
I/O
—
LCDDAT19
O
PIO, I, PU, ST
C6
VDDIOP0
GPIO
PC12
I/O
—
MCI2_DA1
I/O
TIOA1
I/O
LCDDAT18
O
PIO, I, PU, ST
E7
VDDIOP0
GPIO
PC13
I/O
—
MCI2_DA2
I/O
TIOB1
I/O
LCDDAT17
O
PIO, I, PU, ST
B2
VDDIOP0
GPIO
PC14
I/O
—
MCI2_DA3
I/O
TCLK1
I
LCDDAT16
O
PIO, I, PU, ST
F6
VDDIOP0
MCI_CLK
PC15
I/O
—
MCI2_CK
I/O
PCK2
O
LCDDAT21
O
PIO, I, PU, ST
B1
VDDIOP0
GPIO
PC16
I/O
—
TK0
I/O
—
PIO, I, PU, ST
E6
VDDIOP0
GPIO
PC17
I/O
—
TF0
I/O
—
PIO, I, PU, ST
C3
VDDIOP0
GPIO
PC18
I/O
—
TD0
O
—
PIO, I, PU, ST
D6
VDDIOP0
GPIO
PC19
I/O
—
RK0
I/O
—
PIO, I, PU, ST
C4
VDDIOP0
GPIO
PC20
I/O
—
RF0
I/O
—
PIO, I, PU, ST
Table 4-1.
SAMA5D3 Pinout for 324-ball LFBGA Package (Continued)
Pin
Power Rail
I/O Type
Primary
Alternate
PIO Peripheral A
PIO Peripheral B
PIO Peripheral C
Reset State
Signal
Dir
Signal
Dir
Signal
Dir
Signal
Dir
Signal
Dir
Signal, Dir,
PU, PD, HiZ,
ST
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