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| 型號： | MC92600CJUB |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PBGA217 |
| 封裝： | 23 X 23 MM, 2.32 MM HEIGHT, 1.27 MM PITCH, PLASTIC, BGA-217 |
| 文件頁數(shù)： | 20/98頁 |
| 文件大?。?/td> | 1288K |
| 代理商： | MC92600CJUB |
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MOTOROLA
Chapter 2. Transmitter
2-7
Device Operations
2.5
Device Operations
The MC92600 transmitter is comprised of several components whose operations are
described in the following sections.
2.5.1
8B/10B Encoder Operation
The 8B/10B encoder transforms 8-bit data/control characters from the input register into
10-bit transmission characters. The bre channel 8B/10B coding standard is followed [1,2].
Running disparity is maintained and the appropriate transmission characters are produced,
maintaining DC balance and sufcient transition density to allow reliable data recovery at
the receiver. See Appendix B, “8B/10B Coding Scheme” for a detailed description of
8B/10B coding.
The inputs to the 8B/10B encoder are the data byte (XMIT_x_7 through XMIT_x_0),
special code signal (XMIT_x_K) and transmit idle signal (XMIT_x_IDLE).
Data and legal control bytes are coded according to the 8B/10B method. Illegal control
bytes produce unpredictable transmission characters, leading to disparity and coding errors,
ultimately reducing link reliability.
The 8B/10B encoder produces an idle character of proper running disparity when
XMIT_x_IDLE is low, XMIT_x_K is high, and WSE_GEN is low, as indicated in Table
2-2, "Transmitter Control States.” The 8B/10B encoder is bypassed in TBI mode.
2.5.2
Transmit Driver Operation
The transmit driver drives transmission characters serially across the link. Two bits per
transceiver clock, one each on the rising and falling transceiver clock (rx_clock) edges, are
transmitted differentially from the XLINK_x_P (positive) and XLINK_x_N (negative)
outputs. The rx_clock runs at 625 MHz for 1 Gbps (1.25 gigabaud) operation and at 312.5
MHz for 500 Mbps (625 megabaud) operation.
The transmit driver is a controlled impedance driver. The impedance of the driver is
programmable to 50
or 75 through the MEDIA signal. Drive impedance is 50 when
MEDIA is low and 75
when MEDIA is high.
A special loop-back mode is supported for test. Asserting the LBE signal high enables
loop-back mode causing the state being driven on XLINK_x_P/XLINK_x_N to be looped
back to the input amplier of the link’s receiver. Loop-back data is processed the same as
normally received data. Loop-back enables at-speed self-test to be implemented for
production test and for in-system self-test. The loop-back signals are electrically isolated
from the XLINK_x_P/XLINK_x_N output signals. Therefore, if the outputs are shorted, or
otherwise restricted, the loop-back signals still operate normally. When in loop-back mode,
the LBOE signal controls the action of the XLINK_x_P/XLINK_x_N output signals. When
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