參數(shù)資料
型號： MCZ33927EK
廠商： 飛思卡爾半導體(中國)有限公司
英文描述： Transistor; Type: Amplifiers/Bipolar; VCEO (V): -100; Ic (A): -1; Pc (W): 0.9; hFE: 140 to 350; VCE (sat) (V) max: -0.5; Package: TO-92Mod
中文描述： 三相場效應晶體管預驅(qū)動器
文件頁數(shù)： 32/44頁
文件大小： 490K
代理商： MCZ33927EK
Analog Integrated Circuit Device Data
Freescale Semiconductor
32
33927
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
DEADTIME COMMAND
Deadtime prevents the turn-on of both transistors in the
same phase until the deadtime has expired. The deadtime
timer starts when a FET is commanded off (see
Figure 6
and
Figure 11
). The deadtime control is disabled by enabling the
FULLON mode.
The deadtime is set by sending the DEADTIME command
(100x xxx1), and then sending a calibration pulse of CS. This
pulse must be 16 times longer than the required deadtime
(see
Figure 16
). Deadtime is measured in cycle times of the
internal time base,
f
TB
. This measurement is divided by 16
and stored in an internal register to provide the reference for
timing the deadtime between high and low gate transactions
in the same phase.
For example: the internal time base is running at 20MHz
and a 1.5 μs deadtime is required. First a DEADTIME
command is sent (using the SPI), then a CS is sent. The CS
pulse is 16*1.5=24 μs wide. The IC measures this pulse as
24000ns/50ns = 480 clock cycles and stores 480/16=30 in
the deadtime register. Until the next deadtime calibration is
performed, 30 clock cycles will separate the turn off and turn
on gate signals in the same phase. The worst case error
immediately after calibration will be +0/-1 time base cycle, for
this example +0ns/-50ns. Note that if the internal time base
drifts, the effect on dead time will scale directly.
Sending a ZERO DEADTIME command (100x xxx0) sets
the deadtime timer to 0. However, simultaneous turn-on of
high-side and low-side FETs in the same phase is still
prevented unless the FULLON command has been
transmitted. There is no calibration pulse expected after
receiving the ZERO DEADTIME command.
After RESET, deadtime is set to the maximum value of 255
time base cycles (typically 15 μs).
The IC ignores any SPI data that is sent during the
calibration pulse. If there are any transitions on SI or SCLK
while the Deadtime CS pulse is low, a Framing Error will be
generated, however, the CS pulse will be used to calibrate
the deadtime
Figure 16. Deadtime Calibration
Table 13. .DEADTIME Command
SPI Data Bits
7
6
5
4
3
2
1
0
Write
1
0
0
x
x
x
x
ZERO/
CALIBRATE
Reset
x
x
x
x
CS
SCLK
SI
SO
DEADTIME
Command
Deadtime Calibration Pulse
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相關代理商/技術參數(shù)
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